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Discussione: Jasper 512mb cb6754 R-Jtagnon avvia Xell

  1. 10-12-13 #1
    tonyamme
    tonyamme è offline
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    Dec 2011
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    Jasper 512mb cb6754 R-Jtagnon avvia Xell

    Ciao a tutti i membri del forum!
    Apro questo Thread che in realtà è simile all'ultimo che ho aperto.
    La questione è questa: sono alle prese con il mio secondo R-Jtag.. il primo non è andato a buon fine perciò, volevo farmi del male col secondo.
    A parte i preamboli leopardiani, ho in mano una jasper ds 512mb e cb 6754; ho letto la nand, ho scritto xell e poi ho installato il chippone r-jtag v1.1.
    Premetto che ho già fatto numerosissime prove con i vari settaggi ma xell non ne vuole sapere di avviarsi.
    Posto alcune foto dell'installazione. Il punto più in basso della qsb jtag non l'ho saldato perchè ho optato per la soluzione con AUD_CLAMP.
    Richiedo lumi a voi esperti, magari riuscite a notare qualcosa che mi sfugge.

    Jasper 512mb cb6754 R-Jtagnon avvia Xell-imag1428.jpgJasper 512mb cb6754 R-Jtagnon avvia Xell-imag1429.jpgJasper 512mb cb6754 R-Jtagnon avvia Xell-imag1430.jpgJasper 512mb cb6754 R-Jtagnon avvia Xell-imag1431.jpgJasper 512mb cb6754 R-Jtagnon avvia Xell-imag1432.jpgJasper 512mb cb6754 R-Jtagnon avvia Xell-imag1432pp.jpgJasper 512mb cb6754 R-Jtagnon avvia Xell-imag1434.jpgJasper 512mb cb6754 R-Jtagnon avvia Xell-imag1435.jpgJasper 512mb cb6754 R-Jtagnon avvia Xell-imag1436.jpgJasper 512mb cb6754 R-Jtagnon avvia Xell-imag1437.jpg
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  2. 10-12-13 #2
    tonyamme
    tonyamme è offline
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    Jasper 512mb cb6754 R-Jtagnon avvia Xell-imag1433.jpg

    Un'ultima immagine del lavoro. Come vedete ho utilizzato un cavo più fino per il punto CPU_RST. Inizialmente ho usato il cavetto blu in dotazione e poi ho fatto una prova con questo più fino.
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  3. 10-12-13 #3
    zeruel85
    zeruel85 è offline
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    Il log del Rater?
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  4. 10-12-13 #4
    tonyamme
    tonyamme è offline
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    Eccolo:

    Codice:
    Phat Selected
Version: 10
Power Up
Waiting for POST to change
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post F8 
Post F8 
Post F9 
Post F8 
Post FC 
Post FB 
Post F8 
Post FB 
Post FB 
Post F8 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post F8 
Post F8 
Post FC 
Post F8 
Post F8 
Post F8 
Post F8 
Post F8 
Post F8 
Post F9 
Post F8 
Post F8 
Post F8 
Post F9 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post F8 
Post F8 
Post F9 
Post F8 
Post F8 
Post F8 
Post F8 
Post F9 
Post FB 
Post F8 
Post F9 
Post 98 - Panic - NEXT_STAGE_SIZE 
Post F8 
Post F8 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 42 - FETCH_HEADER 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 5A - INIT_XEX_TRAINING 
Post 61 - INIT_HAL_PHASE_0 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6E - INIT_SETTINGS 
Post 6F - INIT_POWER_MODE 
Shutdown
Power Up
Waiting for POST to change
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post F8 
Post FC 
Post F8 
Post F8 
Post F8 
Post F8 
Post F9 
Post F8 
Post F8 
Post F8 
Post F8 
Post F8 
Post F8 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post F8 
Post F8 
Post F9 
Post F8 
Post F8 
Post FC 
Post F8 
Post F8 
Post F8 
Post F9 
Post F8 
Post F8 
Post F8 
Post F8 
Post FC 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 15 - FETCH_OFFSET 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post FC 
Post F8 
Post F8 
Post F8 
Post F8 
Post F8 
Post FC 
Post FC 
Post F8 
Post F8 
Post F8 
Post FC 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 18 - FETCH_CONTENTS 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post FC 
Post FB 
Post F8 
Post F8 
Post F9 
Post FC 
Post F8 
Post FC 
Post F8 
Post F8 
Post F8 
Post F8 
Post F8 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 15 - FETCH_OFFSET 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post F8 
Post F8 
Post F8 
Post F8 
Post F8 
Post F8 
Post F8 
Post B8 - Panic - CF auth failed 
Post F9 
Post F9 
Post F8 
Post FC 
Post F8 
Post F8 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post F8 
Post F8 
Post 20 - CB entry point reached 
Post F8 
Post F8 
Post F8 
Post F8 
Post FC 
Post FC 
Post F8 
Post F8 
Post FC 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 31 - FETCH_HEADER_4BL_CD 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 42 - FETCH_HEADER 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 5A - INIT_XEX_TRAINING 
Post 61 - INIT_HAL_PHASE_0 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6C - INIT_SECURITY 
Post 6F - INIT_POWER_MODE 
Shutdown
Power Up
Waiting for POST to change
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post B9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 31 - FETCH_HEADER_4BL_CD 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 5A - INIT_XEX_TRAINING 
Post 60 - INIT_KERNEL 
Post 61 - INIT_HAL_PHASE_0 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 6A - INIT_HAL_PHASE_1 
Post 6C - INIT_SECURITY 
Post 6F - INIT_POWER_MODE 
Shutdown
Power Up
Waiting for POST to change
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post F8 
Post F8 
Post F8 
Post F8 
Post F8 
Post F8 
Post F8 
Post F8 
Post 10 - Payload/1BL started 
Post F8 
Post FC 
Post FC 
Post F8 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 31 - FETCH_HEADER_4BL_CD 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 41 - VERIFY_OFFSET 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 5A - INIT_XEX_TRAINING 
Post 61 - INIT_HAL_PHASE_0 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6F - INIT_POWER_MODE 
Shutdown
Power Up
Waiting for POST to change
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post B9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 31 - FETCH_HEADER_4BL_CD 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 42 - FETCH_HEADER 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 5A - INIT_XEX_TRAINING 
Post 61 - INIT_HAL_PHASE_0 
Post 62 - INIT_PROCESS_OBJECTS 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 6C - INIT_SECURITY 
Post 6F - INIT_POWER_MODE 
Shutdown
Power Up
Waiting for POST to change
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post F0 - Panic - VERIFY_OFFSET_CB_B 
Post FC 
Post F8 
Post FD 
Post F8 
Post FC 
Post F8 
Post FC 
Post F8 
Post FE 
Post F8 
Post F8 
Post F8 
Post F8 
Post F8 
Post F9 
Post F8 
Post 12 - FSB_CONFIG_RX_STATE 
Post 18 - FETCH_CONTENTS 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post F8 
Post F8 
Post F8 
Post F8 
Post FC 
Post F8 
Post F9 
Post F8 
Post F8 
Post F8 
Post F8 
Post FE 
Post F8 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 15 - FETCH_OFFSET 
Post 18 - FETCH_CONTENTS 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post F8 
Post F8 
Post FC 
Post F9 
Post F8 
Post F8 
Post FC 
Post F8 
Post FC 
Post F8 
Post FD 
Post F8 
Post 10 - Payload/1BL started 
Post F8 
Post F8 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 19 - HMACSHA_COMPUTE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post F8 
Post FC 
Post FC 
Post F8 
Post F8 
Post FB 
Post F8 
Post F8 
Post FB 
Post FC 
Post FB 
Post F8 
Post F8 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post FC 
Post F8 
Post F8 
Post F8 
Post F8 
Post FC 
Post F8 
Post FC 
Post F8 
Post FC 
Post B0 - Panic - VERIFY_CONSOLE_TYPE 
Post FC 
Post F9 
Post F8 
Post F8 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post F8 
Post F8 
Post F8 
Post F8 
Post FC 
Post F8 
Post F8 
Post FC 
Post FC 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post FC 
Post F8 
Post F8 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 15 - FETCH_OFFSET 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post F8 
Post FE 
Post F8 
Post F8 
Post F8 
Post FB 
Post F8 
Post F8 
Post FB 
Post F8 
Post F8 
Post FC 
Post F8 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 18 - FETCH_CONTENTS 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post CC 
Post F8 
Post F8 
Post F8 
Post FC 
Post B0 - Panic - VERIFY_CONSOLE_TYPE 
Post F8 
Post F8 
Post F8 
Post F8 
Post F8 
Post F9 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 17 - VERIFY_HEADER 
Post 18 - FETCH_CONTENTS 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post F8 
Post F8 
Post F8 
Post F9 
Post F8 
Post FB 
Post F9 
Post F8 
Post FC 
Post F8 
Post FC 
Post FC 
Post F8 
Post FC 
Post F8 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 15 - FETCH_OFFSET 
Post 18 - FETCH_CONTENTS 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post F8 
Post FB 
Post FC 
Post F8 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post F8 
Post F8 
Post F8 
Post F8 
Post F8 
Post F8 
Post FB 
Post F8 
Post F8 
Post FC 
Post 10 - Payload/1BL started 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 18 - FETCH_CONTENTS 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post F8 
Post F8 
Post F8 
Post F8 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post F8 
Post F8 
Post FC 
Post 40 - Entrypoint of CD reached 
Post FC 
Post F8 
Post F8 
Post FC 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 15 - FETCH_OFFSET 
Post 18 - FETCH_CONTENTS 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 31 - FETCH_HEADER_4BL_CD 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 5A - INIT_XEX_TRAINING 
Post 61 - INIT_HAL_PHASE_0 
Post 62 - INIT_PROCESS_OBJECTS 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6F - INIT_POWER_MODE 
Shutdown
Power Up
Waiting for POST to change
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 42 - FETCH_HEADER 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 61 - INIT_HAL_PHASE_0 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 6A - INIT_HAL_PHASE_1 
Post 6C - INIT_SECURITY 
Post 6F - INIT_POWER_MODE 
Shutdown
Power Up
Waiting for POST to change
Post 38 - SIG_VERIFY_4BL_CD 
Post F8 
Post 38 - SIG_VERIFY_4BL_CD 
Post F8 
Post 38 - SIG_VERIFY_4BL_CD 
Post F8 
Post 38 - SIG_VERIFY_4BL_CD 
Post F8 
Post 38 - SIG_VERIFY_4BL_CD 
Post F8 
Post 38 - SIG_VERIFY_4BL_CD 
Post F8 
Post 38 - SIG_VERIFY_4BL_CD 
Post F8 
Post 38 - SIG_VERIFY_4BL_CD 
Post F8 
Post 38 - SIG_VERIFY_4BL_CD 
Post F8 
Post 38 - SIG_VERIFY_4BL_CD 
Post F8 
Post 38 - SIG_VERIFY_4BL_CD 
Post F8 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post F8 
Post F8 
Post F8 
Post F8 
Post F8 
Post F8 
Post F9 
Post F8 
Post F9 
Post F8 
Post F8 
Post FB 
Post F9 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 31 - FETCH_HEADER_4BL_CD 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 40 - Entrypoint of CD reached 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 5A - INIT_XEX_TRAINING 
Post 61 - INIT_HAL_PHASE_0 
Post 62 - INIT_PROCESS_OBJECTS 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6F - INIT_POWER_MODE 
Shutdown
Power Up
Waiting for POST to change
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post F8 
Post F8 
Post F8 
Post F8 
Post F8 
Post F9 
Post F8 
Post FC 
Post F8 
Post F8 
Post FC 
Post F8 
Post F8 
Post F8 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 15 - FETCH_OFFSET 
Post 18 - FETCH_CONTENTS 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 31 - FETCH_HEADER_4BL_CD 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 42 - FETCH_HEADER 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 5A - INIT_XEX_TRAINING 
Post 60 - INIT_KERNEL 
Post 61 - INIT_HAL_PHASE_0 
Post 62 - INIT_PROCESS_OBJECTS 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6F - INIT_POWER_MODE 
Shutdown
Power Up
Waiting for POST to change
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 31 - FETCH_HEADER_4BL_CD 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 42 - FETCH_HEADER 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 5A - INIT_XEX_TRAINING 
Post 60 - INIT_KERNEL 
Post 61 - INIT_HAL_PHASE_0 
Post 62 - INIT_PROCESS_OBJECTS 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6F - INIT_POWER_MODE 
Shutdown
Power Up
Waiting for POST to change
Post 38 - SIG_VERIFY_4BL_CD 
Post F8 
Post 38 - SIG_VERIFY_4BL_CD 
Post F8 
Post 38 - SIG_VERIFY_4BL_CD 
Post F8 
Post 38 - SIG_VERIFY_4BL_CD 
Post F8 
Post 38 - SIG_VERIFY_4BL_CD 
Post F8 
Post 38 - SIG_VERIFY_4BL_CD 
Post F8 
Post 38 - SIG_VERIFY_4BL_CD 
Post F8 
Post 38 - SIG_VERIFY_4BL_CD 
Post F8 
Post 38 - SIG_VERIFY_4BL_CD 
Post F8 
Post 38 - SIG_VERIFY_4BL_CD 
Post F8 
Post 38 - SIG_VERIFY_4BL_CD 
Post F8 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post FC 
Post F8 
Post FB 
Post F8 
Post F8 
Post F8 
Post F8 
Post F9 
Post F8 
Post F8 
Post F8 
Post F9 
Post F8 
Post F8 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 15 - FETCH_OFFSET 
Post 18 - FETCH_CONTENTS 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post F9 
Post F8 
Post F8 
Post F8 
Post F8 
Post F8 
Post F8 
Post F8 
Post F9 
Post F8 
Post F8 
Post F8 
Post B8 - Panic - CF auth failed 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 15 - FETCH_OFFSET 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post F8 
Post F8 
Post F8 
Post F8 
Post F8 
Post F8 
Post FC 
Post F8 
Post F8 
Post F8 
Post F8 
Post F8 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post F8 
Post F8 
Post F8 
Post F8 
Post F8 
Post F8 
Post F8 
Post 40 - Entrypoint of CD reached 
Post FC 
Post F8 
Post F8 
Post F8 
Post F9 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 15 - FETCH_OFFSET 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post FD 
Post F8 
Post FC 
Post F8 
Post F8 
Post FD 
Post F8 
Post F8 
Post FE 
Post F8 
Post F8 
Post F8 
Post F8 
Post FB 
Post F8 
Post 40 - Entrypoint of CD reached 
Post E0 
Post 10 - Payload/1BL started 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post F8 
Post 80 
Post FC 
Post F8 
Post F8 
Post F8 
Post F8 
Post F8 
Post F8 
Post B8 - Panic - CF auth failed 
Post F8 
Post F8 
Post F8 
Post FC 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 31 - FETCH_HEADER_4BL_CD 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 42 - FETCH_HEADER 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 5A - INIT_XEX_TRAINING 
Post 61 - INIT_HAL_PHASE_0 
Post 62 - INIT_PROCESS_OBJECTS 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6C - INIT_SECURITY 
Post 6F - INIT_POWER_MODE 
Shutdown
Power Up
Waiting for POST to change
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post F8 
Post F8 
Post FC 
Post F8 
Post F8 
Post F8 
Post F8 
Post 98 - Panic - NEXT_STAGE_SIZE 
Post F8 
Post F8 
Post F8 
Post FA 
Post F8 
Post F8 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post F9 
Post F8 
Post 30 - VERIFY_OFFSET_4BL_CD 
Post F8 
Post F8 
Post F8 
Post FC 
Post F8 
Post F8 
Post F8 
Post F8 
Post F9 
Post F8 
Post F8 
Post 10 - Payload/1BL started 
Post 18 - FETCH_CONTENTS 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post F8 
Post F8 
Post F9 
Post FC 
Post F8 
Post F8 
Post F8 
Post FB 
Post F9 
Post F8 
Post F8 
Post F9 
Post F8 
Post F9 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 15 - FETCH_OFFSET 
Post 18 - FETCH_CONTENTS 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post F8 
Post F8 
Post B8 - Panic - CF auth failed 
Post F8 
Post F8 
Post F8 
Post F8 
Post F8 
Post FC 
Post F8 
Post F8 
Post F8 
Post F8 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 5A - INIT_XEX_TRAINING 
Post 60 - INIT_KERNEL 
Post 61 - INIT_HAL_PHASE_0 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6E - INIT_SETTINGS 
Post 6F - INIT_POWER_MODE 
Shutdown
Power Up
Waiting for POST to change
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post FC 
Post F8 
Post FC 
Post F8 
Post 08 
Post F8 
Post F8 
Post 48 - SHA_COMPUTE 
Post F8 
Post F8 
Post F8 
Post FB 
Post F8 
Post F9 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 42 - FETCH_HEADER 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 49 - SHA_VERIFY 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 59 - INIT_SOC_MMIO 
Post 5A - INIT_XEX_TRAINING 
Post 60 - INIT_KERNEL 
Post 61 - INIT_HAL_PHASE_0 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6F - INIT_POWER_MODE 
Shutdown
Power Up
Waiting for POST to change
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post F8 
Post F8 
Post F8 
Post F8 
Post F9 
Post F8 
Post F8 
Post F8 
Post FD 
Post F8 
Post F8 
Post F8 
Post F8 
Post F8 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 14 - FSB_CONFIG_TX_CREDITS 
Post 18 - FETCH_CONTENTS 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post F8 
Post F8 
Post F8 
Post 98 - Panic - NEXT_STAGE_SIZE 
Post F8 
Post F8 
Post F8 
Post F8 
Post F8 
Post F9 
Post F8 
Post FC 
Post F8 
Post F8 
Post F8 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post F8 
Post F8 
Post F8 
Post F8 
Post F9 
Post F8 
Post F8 
Post F8 
Post F8 
Post F8 
Post F9 
Post F8 
Post F8 
Post F8 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post FC 
Post F8 
Post F8 
Post F8 
Post F8 
Post F8 
Post F8 
Post F8 
Post FB 
Post F8 
Post F8 
Post F8 
Post F9 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 15 - FETCH_OFFSET 
Post 16 - FETCH_HEADER 
Post 19 - HMACSHA_COMPUTE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post F0 - Panic - VERIFY_OFFSET_CB_B 
Post F9 
Post FB 
Post FC 
Post F8 
Post F8 
Post F8 
Post F8 
Post F8 
Post F8 
Post F9 
Post F8 
Post 12 - FSB_CONFIG_RX_STATE 
Post 15 - FETCH_OFFSET 
Post 1A - RC4_INITIALIZE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post F0 - Panic - VERIFY_OFFSET_CB_B 
Post F8 
Post FC 
Post F8 
Post FC 
Post F8 
Post F9 
Post F8 
Post F8 
Post F9 
Post B8 - Panic - CF auth failed 
Post F9 
Post FC 
Post 12 - FSB_CONFIG_RX_STATE 
Post 15 - FETCH_OFFSET 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 31 - FETCH_HEADER_4BL_CD 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 42 - FETCH_HEADER 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 5A - INIT_XEX_TRAINING 
Post 61 - INIT_HAL_PHASE_0 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6F - INIT_POWER_MODE 
Shutdown
Power Up
Waiting for POST to change
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post 79 - LOAD_XAM 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post FC 
Post F8 
Post FC 
Post F8 
Post F8 
Post F8 
Post F8 
Post F8 
Post F8 
Post FD 
Post F8 
Post FC 
Post F8 
Post F8 
Post F8 
Post F9 
Post F8 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 15 - FETCH_OFFSET 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 5A - INIT_XEX_TRAINING 
Post 61 - INIT_HAL_PHASE_0 
Post 62 - INIT_PROCESS_OBJECTS 
Post 63 - INIT_KERNEL_DEBUGGER 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6A - INIT_HAL_PHASE_1 
Post 6B - INIT_SFC_DRIVER 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6F - INIT_POWER_MODE 
Shutdown
    Ultima modifica di zeruel85; 10-12-13 alle 12: 46
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  5. 10-12-13 #5
    tonyamme
    tonyamme è offline
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    Jasper 512mb cb6754 R-Jtagnon avvia Xell-my-rater-screenshot.png

    anche un'immagine
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  6. 10-12-13 #6
    zeruel85
    zeruel85 è offline
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    A me sembra che abbia glitchato e si sia avviata... Non noto anomalie. Qual è il tuo problema?
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  7. 10-12-13 #7
    tonyamme
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    Xell Reloaded non si avvia
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  8. 10-12-13 #8
    zeruel85
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    Per forza, perchè continua a spegnersi la console se lanci il Rater... Accendila normalmente, senza fare il Rater e Xell apparirà a video.
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  9. 10-12-13 #9
    tonyamme
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    JRP è staccato, il chip continua a lampeggiare ma a video non compare mai nulla.. ad ogni lampeggio si avverte una accelerazione delle ventole ma nulla ..xell non si avvia
    Ultima modifica di tonyamme; 10-12-13 alle 13: 17
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  10. 10-12-13 #10
    zeruel85
    zeruel85 è offline
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    Ma il Rater dice l'opposto...

    Inviato dal mio GT-I8150 utilizzando Tapatalk
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  11. 10-12-13 #11
    tonyamme
    tonyamme è offline
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    sto riprovando col rater e non mi dà più gli stessi risultati:

    Most Fails(cumulative): 0xA0
    Shutdown
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  12. 10-12-13 #12
    pocoyo2
    pocoyo2 è offline
    Yocopoco Ma Yoco! L'avatar di pocoyo2
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    Secondo me hai fatto qualche casino nella zona JTAG. Il glitch va a buon fine, infatti carica quasi tutto. Si ferma a 6F - Init Power Mode (mica hai modificato qualcosa?). Se togli tutta la parte JTAG e lasci solo la parte RGH (quindi POST, RST, SDA, SCL) dovrebbe darti 1 led rosso (e79). Se non te lo da c'è qualcosa che non va a livello hardware, probabilmente.
    PS: stacca il kiosk (punto K) ma lascia sempre attaccato e monitorato JRP e Rater. Senza di loro è impossibile capire dove sta il problema.
    "... quando il domani verrà, il tuo domani sarà!"
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  13. 10-12-13 #13
    tonyamme
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    Ho notato che i risultati migliori col rater li ottengo con il DIP 4-7-8 su ON, ponticello per 1,2v, switch a tre posizioni centrale, ponticello resistanza 330, switch a 2 posizioni su on: questo è il log del rater:

    Codice:
    Phat Selected
Version: 10
Power Up
Waiting for POST to change
Post EF 
Post EE 
Post EC 
Post 6C - INIT_SECURITY 
Post 4C - SWEEP_CACHES 
Post 48 - SHA_COMPUTE 
Post 40 - Entrypoint of CD reached 
Post DF 
Post 4A - LOAD_6BL_CF 
Post 42 - FETCH_HEADER 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post F9 
Post 39 - SHA_VERIFY_4BL_CD 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post FD 
Post 0C 
Post FC 
Post FC 
Post FC 
Post 04 
Post FC 
Post FC 
Post FC 
Post FC 
Post FC 
Post FC 
Post 04 
Post 10 - Payload/1BL started 
Post 12 - FSB_CONFIG_RX_STATE 
Post 13 - FSB_CONFIG_TX_STATE 
Post 15 - FETCH_OFFSET 
Post 18 - FETCH_CONTENTS 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post FC 
Post F8 
Post F8 
Post F8 
Post F8 
Post F8 
Post FC 
Post F8 
Post FC 
Post F8 
Post FC 
Post BC 
Post FC 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 15 - FETCH_OFFSET 
Post 18 - FETCH_CONTENTS 
Post 19 - HMACSHA_COMPUTE 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post A0 - Panic - VERIFY_SECOTP_6 
Post FE 
Post 06 
Post FE 
Post 06 
Post FE 
Post 06 
Post FE 
Post 06 
Post 06 
Post FE 
Post FE 
Post FE 
Post FE 
Post BE 
Post FE 
Post FE 
Post 8E - Panic - VPU_UNAVAILABLE 
Post 10 - Payload/1BL started 
Post 12 - FSB_CONFIG_RX_STATE 
Post 18 - FETCH_CONTENTS 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post FC 
Post F8 
Post FC 
Post F8 
Post C8 - SHA_VERIFY 
Post FC 
Post F8 
Post FC 
Post F8 
Post F8 
Post F8 
Post F8 
Post 38 - SIG_VERIFY_4BL_CD 
Post F8 
Post F8 
Post FC 
Post FE 
Post 10 - Payload/1BL started 
Post 11 - FSB_CONFIG_PHY_CONTROL 
Post 12 - FSB_CONFIG_RX_STATE 
Post 18 - FETCH_CONTENTS 
Post 1B - RC4_DECRYPT 
Post 1C - SHA_COMPUTE 
Post 1D - SIG_VERIFY 
Post 1E - BRANCH 
Post 20 - CB entry point reached 
Post 21 - INIT_SECOTP 
Post 22 - INIT_SECENG 
Post 2F - RELOCATE 
Post 2E - HWINIT 
Post 31 - FETCH_HEADER_4BL_CD 
Post 33 - FETCH_CONTENTS_4BL_CD 
Post 34 - HMACSHA_COMPUTE_4BL_CD 
Post 35 - RC4_INITIALIZE_4BL_CD 
Post 36 - RC4_DECRYPT_4BL_CD 
Post 37 - SHA_COMPUTE_4BL_CD 
Post 3A - BRANCH 
Post 40 - Entrypoint of CD reached 
Post 42 - FETCH_HEADER 
Post 44 - FETCH_CONTENTS 
Post 45 - HMACSHA_COMPUTE 
Post 46 - RC4_INITIALIZE 
Post 47 - RC4_DECRYPT 
Post 48 - SHA_COMPUTE 
Post 4B - LZX_EXPAND 
Post 4E - FETCH_OFFSET_6BL_CF 
Post 4F - VERIFY_OFFSET_6BL_CF 
Post 50 - LOAD_UPDATE_1 
Post 52 - BRANCH 
Post 58 - INIT_HYPERVISOR 
Post 5A - INIT_XEX_TRAINING 
Post 60 - INIT_KERNEL 
Post 61 - INIT_HAL_PHASE_0 
Post 62 - INIT_PROCESS_OBJECTS 
Post 64 - INIT_MEMORY_MANAGER 
Post 65 - INIT_STACKS 
Post 66 - INIT_OBJECT_SYSTEM 
Post 67 - INIT_PHASE1_THREAD 
Post 68 - Started phase 1 Initialization + INIT_PROCESSORS 
Post 69 - INIT_KEY_VAULT 
Post 6C - INIT_SECURITY 
Post 6D - INIT_KEY_EX_VAULT 
Post 6F - INIT_POWER_MODE 
Shutdown
    Quando avvio la console senza il JRP collegato il led debugga una sola volta, al massimo 2 volte e poi basta.
    Ultima modifica di zeruel85; 10-12-13 alle 16: 11
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  14. 10-12-13 #14
    tonyamme
    tonyamme è offline
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    Citazione Originariamente Scritto da pocoyo2 Visualizza Messaggio
    Secondo me hai fatto qualche casino nella zona JTAG. Il glitch va a buon fine, infatti carica quasi tutto. Si ferma a 6F - Init Power Mode (mica hai modificato qualcosa?). Se togli tutta la parte JTAG e lasci solo la parte RGH (quindi POST, RST, SDA, SCL) dovrebbe darti 1 led rosso (e79). Se non te lo da c'è qualcosa che non va a livello hardware, probabilmente.
    PS: stacca il kiosk (punto K) ma lascia sempre attaccato e monitorato JRP e Rater. Senza di loro è impossibile capire dove sta il problema.
    Se stacco il punto K devo togliere l'AUD_CLAMP e saldare la resistenza in punta alla basetta jtag?
    Puoi piegarmi meglio cosa significa "se togli la parte jtag"? Devo dissaldare la qsb jtag? oppure mettere in off lo switch a due posizioni?
    Ultima modifica di tonyamme; 10-12-13 alle 16: 12
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  15. 11-12-13 #15
    tonyamme
    tonyamme è offline
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    Citazione Originariamente Scritto da tonyamme Visualizza Messaggio
    Se stacco il punto K devo togliere l'AUD_CLAMP e saldare la resistenza in punta alla basetta jtag?
    Puoi piegarmi meglio cosa significa "se togli la parte jtag"? Devo dissaldare la qsb jtag? oppure mettere in off lo switch a due posizioni?
    Sono ancora in stand-by ragazzi..
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  16. 15-12-13 #16
    pocoyo2
    pocoyo2 è offline
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    Controlla l'interruttore sulla porta jtag (quello per selezionare le resistenze) che non sia su off
    "... quando il domani verrà, il tuo domani sarà!"
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