[RISOLTO] Jasper R-JTAG non ne vuole sapere

[chojin]

Premetto che ho provato tutte e 18 le combinazioni da 1 a 6 con 0 - 1.2 - 1.8V

questo il rater :

Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post 30 - VERIFY_OFFSET_4BL_CD
Post 20 - CB entry point reached
Post 30 - VERIFY_OFFSET_4BL_CD
Post 30 - VERIFY_OFFSET_4BL_CD
Post 30 - VERIFY_OFFSET_4BL_CD
Post 20 - CB entry point reached
Post 30 - VERIFY_OFFSET_4BL_CD
Post 30 - VERIFY_OFFSET_4BL_CD
Post 30 - VERIFY_OFFSET_4BL_CD
Post 30 - VERIFY_OFFSET_4BL_CD
Post 30 - VERIFY_OFFSET_4BL_CD
Post 30 - VERIFY_OFFSET_4BL_CD
Post 30 - VERIFY_OFFSET_4BL_CD
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 30 - VERIFY_OFFSET_4BL_CD
Post 20 - CB entry point reached
Post 30 - VERIFY_OFFSET_4BL_CD
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 30 - VERIFY_OFFSET_4BL_CD
Post 20 - CB entry point reached
Post 30 - VERIFY_OFFSET_4BL_CD
Post 30 - VERIFY_OFFSET_4BL_CD
Post 30 - VERIFY_OFFSET_4BL_CD
Post 30 - VERIFY_OFFSET_4BL_CD
Post 30 - VERIFY_OFFSET_4BL_CD
Post 30 - VERIFY_OFFSET_4BL_CD
Post 30 - VERIFY_OFFSET_4BL_CD
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post 30 - VERIFY_OFFSET_4BL_CD
Post 20 - CB entry point reached
Post 30 - VERIFY_OFFSET_4BL_CD
Post 30 - VERIFY_OFFSET_4BL_CD
Post 30 - VERIFY_OFFSET_4BL_CD
Post 30 - VERIFY_OFFSET_4BL_CD
Post 20 - CB entry point reached
Post 30 - VERIFY_OFFSET_4BL_CD
Post 30 - VERIFY_OFFSET_4BL_CD
Post 30 - VERIFY_OFFSET_4BL_CD
Post 20 - CB entry point reached
Post 30 - VERIFY_OFFSET_4BL_CD
Post 10 - Payload/1BL started
Post 30 - VERIFY_OFFSET_4BL_CD
Post 30 - VERIFY_OFFSET_4BL_CD
Post 10 - Payload/1BL started
Post 11 - FSB_CONFIG_PHY_CONTROL
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 14 - FSB_CONFIG_TX_CREDITS
Post 15 - FETCH_OFFSET
Post 16 - FETCH_HEADER
Post 17 - VERIFY_HEADER
Post 18 - FETCH_CONTENTS
Post 19 - HMACSHA_COMPUTE
Post 1A - RC4_INITIALIZE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post 30 - VERIFY_OFFSET_4BL_CD
Post 20 - CB entry point reached
Post 30 - VERIFY_OFFSET_4BL_CD
Post 20 - CB entry point reached
Post 30 - VERIFY_OFFSET_4BL_CD
Post 30 - VERIFY_OFFSET_4BL_CD
Post 30 - VERIFY_OFFSET_4BL_CD
Post 30 - VERIFY_OFFSET_4BL_CD
Post 30 - VERIFY_OFFSET_4BL_CD
Post 30 - VERIFY_OFFSET_4BL_CD
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 30 - VERIFY_OFFSET_4BL_CD
Post 20 - CB entry point reached
Post 30 - VERIFY_OFFSET_4BL_CD
Post 30 - VERIFY_OFFSET_4BL_CD
Post 30 - VERIFY_OFFSET_4BL_CD
Post 30 - VERIFY_OFFSET_4BL_CD
Post 30 - VERIFY_OFFSET_4BL_CD
Post 20 - CB entry point reached
Post 30 - VERIFY_OFFSET_4BL_CD
Post 20 - CB entry point reached
Post 30 - VERIFY_OFFSET_4BL_CD
Post 30 - VERIFY_OFFSET_4BL_CD
Post 30 - VERIFY_OFFSET_4BL_CD
Post 30 - VERIFY_OFFSET_4BL_CD
Post 30 - VERIFY_OFFSET_4BL_CD
Post 20 - CB entry point reached
Post 30 - VERIFY_OFFSET_4BL_CD
Post 30 - VERIFY_OFFSET_4BL_CD
Post 30 - VERIFY_OFFSET_4BL_CD
Post 30 - VERIFY_OFFSET_4BL_CD
Post 30 - VERIFY_OFFSET_4BL_CD
Post 30 - VERIFY_OFFSET_4BL_CD
Post F9

Fatto sia e senza AUD_CLAMP. Stò per mollare...i post mi paiono OK e anche Zeruel mi ha confermato che dovrebbero andare.

Qualcuno ha qualche idea?!

[The Pusher]

Vorrei che tu togliessi la flat dal qsb post;
Adesso con un puntale a massa ed uno su ogni post mi scrivessi il valore in ohm

[chojin]

p0 137kohm
p1 131
p2 132
p3 134
p4 133
p5 134
p6 134
p7 130

[chojin]

Risolto con Reset sopra su alternativo, V1.2 e timing 3 + una secchiata di bestemmie a coronare il tutto!

[psycho_lod]

Esattamente le stesse configurazioni che uso sempre io + aud_clamp

Di santi ne sono venuti giù anche con me la prima volta...!

[chojin]

Devo dire che per adesso non é stabile la mia....parte una volta ogni 4...sto gioccando un pó con il reset, mi pare dipenda da quello....eventualmente proveró anche AUDCLAMP

inviato dal mio Vectrex

[psycho_lod]

Devo dire che per adesso non é stabile la mia....parte una volta ogni 4...sto gioccando un pó con il reset, mi pare dipenda da quello....eventualmente proveró anche AUDCLAMP

inviato dal mio Vectrex

Si io ho notato che su jasper senza aud_clamp a volte dava led rossi. Con aud_clamp non perde un colpo...a volte però mi arriva a 5 glitch, ma il 50% delle volte boota al pirmo.

[chojin]

Alla fine io setting definitivo e stabile è stato 1.8V e DIP su 3, sempre reset alternativo.

L'aud_Clamp non c'entra nulla con il problema che dava a me (vero zeruel?....ora però non mi cazziare più.... )

[zeruel85]

LOL, ma perchè tirate sempre in mezzo me?

Chiudo e metto RISOLTO.