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Discussione: r-jtag xell si avvia ma il freeboot no!!!

  1. 28-11-13 #41
    kazoom
    kazoom è offline
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    Citazione Originariamente Scritto da dj0hackers Visualizza Messaggio
    trovati grazie ma il risultato è perfettamente identico :'(
    Puoi fare un punto della situazione?

    dash originale 16537

    AUD_CLAMP SI/NO

    Settaggio alimentazione default/1.2/1.8
    Settaggio DIP Switch
    posizionamento interruttori QSB
    Lunghezza cavo CPU_RST
    freeboot generata 16537 aud si/no

    Partiamo da un un punto preciso.

    Poi se riesci a postare una foto migliore delle saldature di E F K 5V ...

    grazie.
    http://www.youtube.com/user/breakingitaly


    notizie del mondo a scazzo.
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  2. 29-11-13 #42
    dj0hackers
    dj0hackers è offline
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    Citazione Originariamente Scritto da kazoom Visualizza Messaggio
    Puoi fare un punto della situazione?

    dash originale 16537

    AUD_CLAMP SI/NO

    Settaggio alimentazione default/1.2/1.8
    Settaggio DIP Switch
    posizionamento interruttori QSB
    Lunghezza cavo CPU_RST
    freeboot generata 16537 aud si/no

    Partiamo da un un punto preciso.

    Poi se riesci a postare una foto migliore delle saldature di E F K 5V ...

    grazie.
    allora dash originale 16537

    aud_clamp SI (provato anche senza aud_clamp ma con risultati identici)
    settaggio alimentazione 1.2v
    dip ON 3, 7 dip OFF 1,2,4,5,6,8
    interruttori qsb: selettore on/off ON, jumper 470, selettore a tre vie in posizione centrale 330/470
    cavo cpu_rst non ho misurato la lunghezza ma è quello originale fornito con r-jtag senza riduzioni
    freeboot generata 16537 selezionando jtag, casella r-jtag e casella aud_clamp

    per le foto mi disp ma non le posso fare ora...fino a lunedì non avrò sotto mano quella console perché devo fare un esame e devo necessariamente studiare, da lunedì mi dedicherò a tempo pieno a lei.

    grazie mille
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  3. 30-11-13 #43
    kazoom
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    Sembra tutto a posto, però leggendo il TUT del Team vedo alcune cose che potresti fare:

    1) provare il punto CPU_reset alternativo: R8C2 (sembra più stabile)

    2) con metodo AUD_clamps suggeriscono questa configurazione:

    DIPS 4, 7 = ON - 1.2v JUMPER ON - JTAG AUD_CLAMP OPTION - 470 JUMPER

    o in alternativa:

    DIPS 5, 7 = ON - NO VOLTAGE JUMPER - JTAG AUD_CLAMP OPTION - 470 JUMPER

    naturalmente il jumper da ponticellare sul QSB sarà 1-3 con AUD_CLAMP


    In sostanza la selezione della corretta scheda madre (Falcon) con DIP 7 ON è giusta, ma per affinare il Tuning devi mettere su ON alternativamente i DIP da 1 a 6 (NON 2 CONSECUTIVI).
    Sembra che 4 o 5 siano consigliati per il tipo di installazione tua con AUD_CLAMP.

    Non so se mi è permesso postarti il link della guida del Team, ad ogni modo non è difficile trovarla con Google ^_^
    dj0hackers likes this.
    http://www.youtube.com/user/breakingitaly


    notizie del mondo a scazzo.
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  4. 30-11-13 #44
    dj0hackers
    dj0hackers è offline
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    Citazione Originariamente Scritto da kazoom Visualizza Messaggio
    Sembra tutto a posto, però leggendo il TUT del Team vedo alcune cose che potresti fare:

    1) provare il punto CPU_reset alternativo: R8C2 (sembra più stabile)

    2) con metodo AUD_clamps suggeriscono questa configurazione:

    DIPS 4, 7 = ON - 1.2v JUMPER ON - JTAG AUD_CLAMP OPTION - 470 JUMPER

    o in alternativa:

    DIPS 5, 7 = ON - NO VOLTAGE JUMPER - JTAG AUD_CLAMP OPTION - 470 JUMPER

    naturalmente il jumper da ponticellare sul QSB sarà 1-3 con AUD_CLAMP


    In sostanza la selezione della corretta scheda madre (Falcon) con DIP 7 ON è giusta, ma per affinare il Tuning devi mettere su ON alternativamente i DIP da 1 a 6 (NON 2 CONSECUTIVI).
    Sembra che 4 o 5 siano consigliati per il tipo di installazione tua con AUD_CLAMP.

    Non so se mi è permesso postarti il link della guida del Team, ad ogni modo non è difficile trovarla con Google ^_^

    grazie kazoom ho letto e riletto quella guida e l'ho seguita tutta facendo le dovute prove di tuning e le migliori prestazioni i le avevo ottenute con dip 3 e 7 on, 1.8v jumper on e senza sud (avevo l'avvio più lento a 1 ciclo *.*) comunque domani finalmente si riparte con le prove e vediamo chi la spunta se io o lei!!!!!!!!!! =)
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  5. 03-12-13 #45
    dj0hackers
    dj0hackers è offline
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    eccomi finalmente di nuovo all'opera sulla console!
    mi hanno mandato tutti i pezzi nuovi e riprovo cominciando dall'inizio.
    Riporto tutto stock e ricomincio da 0 vediamo se questa volta funziona!
    Vi tengo aggiornati!
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  6. 04-12-13 #46
    dj0hackers
    dj0hackers è offline
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    eccomi mi presento sono l'aspirante modder più sfigato della storia!
    Ho rifatto tutto dall'inizio ma il risultato è identico! =(
    facendo il punto di nuovo:

    console falcon
    tipo mod r-jtag

    modalità r-jtag aud_clamp
    switch chip r-jtag 1,2,3,5,6,8 OFF, 4,7 ON
    settaggio alimentazione 1.2
    (configurazione ufficiale consigliata dal tx)
    switch qsb alt v2 on/off = ON, jumper 470 (ponte tra pin centrale e destro cioè quello vicino al selettore a tre vie), selettore a tre vie in posizione centrale (330/470)
    lunghezza cpu_rst circa 19 cm su c7r112
    freeboot generata 16537

    fatta la prova anche con autogg ma non riesce a scaricare i files e non mi genera il freeboot -.-"-"
    come dovrei procedere secondo voi??

    allego anche screenshot e dati del rater








    Phat Selected
    Version: 10
    Power Up
    Waiting for POST to change
    Post 30 - VERIFY_OFFSET_4BL_CD
    Post 30 - VERIFY_OFFSET_4BL_CD
    Post 38 - SIG_VERIFY_4BL_CD
    Post 30 - VERIFY_OFFSET_4BL_CD
    Post 78 - INIT_STFS_DRIVER
    Post 78 - INIT_STFS_DRIVER
    Post 78 - INIT_STFS_DRIVER
    Post 3C
    Post 30 - VERIFY_OFFSET_4BL_CD
    Post 78 - INIT_STFS_DRIVER
    Post 7E
    Post 1B - RC4_DECRYPT
    Post 1C - SHA_COMPUTE
    Post 1D - SIG_VERIFY
    Post 1E - BRANCH
    Post 20 - CB entry point reached
    Post 21 - INIT_SECOTP
    Post 22 - INIT_SECENG
    Post 03
    Post 03
    Post 03
    Post 03
    Post 01
    Post 03
    Post 01
    Post 03
    Post 01
    Post 03
    Post 01
    Post 03
    Post 03
    Post 01
    Post 03
    Post 03
    Post 10 - Payload/1BL started
    Post 11 - FSB_CONFIG_PHY_CONTROL
    Post 12 - FSB_CONFIG_RX_STATE
    Post 13 - FSB_CONFIG_TX_STATE
    Post 14 - FSB_CONFIG_TX_CREDITS
    Post 15 - FETCH_OFFSET
    Post 16 - FETCH_HEADER
    Post 17 - VERIFY_HEADER
    Post 18 - FETCH_CONTENTS
    Post 19 - HMACSHA_COMPUTE
    Post 1A - RC4_INITIALIZE
    Post 1B - RC4_DECRYPT
    Post 1C - SHA_COMPUTE
    Post 1D - SIG_VERIFY
    Post 1E - BRANCH
    Post 20 - CB entry point reached
    Post 21 - INIT_SECOTP
    Post 22 - INIT_SECENG
    Post 01
    Post 03
    Post 03
    Post 03
    Post 01
    Post 03
    Post 01
    Post 03
    Post 03
    Post 03
    Post 03
    Post 03
    Post 03
    Post 03
    Post 10 - Payload/1BL started
    Post 11 - FSB_CONFIG_PHY_CONTROL
    Post 12 - FSB_CONFIG_RX_STATE
    Post 13 - FSB_CONFIG_TX_STATE
    Post 14 - FSB_CONFIG_TX_CREDITS
    Post 15 - FETCH_OFFSET
    Post 16 - FETCH_HEADER
    Post 17 - VERIFY_HEADER
    Post 18 - FETCH_CONTENTS
    Post 19 - HMACSHA_COMPUTE
    Post 1A - RC4_INITIALIZE
    Post 1B - RC4_DECRYPT
    Post 1C - SHA_COMPUTE
    Post 1D - SIG_VERIFY
    Post 1E - BRANCH
    Post 20 - CB entry point reached
    Post 21 - INIT_SECOTP
    Post 87 - Panic - ALIGNMENT
    Post 01
    Post 03
    Post 03
    Post 03
    Post 01
    Post 03
    Post 01
    Post 03
    Post 03
    Post 01
    Post 03
    Post 01
    Post 03
    Post 03
    Post 01
    Post 03
    Post 01
    Post 10 - Payload/1BL started
    Post 11 - FSB_CONFIG_PHY_CONTROL
    Post 12 - FSB_CONFIG_RX_STATE
    Post 13 - FSB_CONFIG_TX_STATE
    Post 14 - FSB_CONFIG_TX_CREDITS
    Post 15 - FETCH_OFFSET
    Post 16 - FETCH_HEADER
    Post 17 - VERIFY_HEADER
    Post 18 - FETCH_CONTENTS
    Post 19 - HMACSHA_COMPUTE
    Post 1A - RC4_INITIALIZE
    Post 1B - RC4_DECRYPT
    Post 1C - SHA_COMPUTE
    Post 1D - SIG_VERIFY
    Post 1E - BRANCH
    Post 20 - CB entry point reached
    Post 21 - INIT_SECOTP
    Post 22 - INIT_SECENG
    Post 41 - VERIFY_OFFSET
    Post 03
    Post 01
    Post 03
    Post 03
    Post 01
    Post 01
    Post 03
    Post 03
    Post 03
    Post 03
    Post 03
    Post 01
    Post 03
    Post 03
    Post 10 - Payload/1BL started
    Post 11 - FSB_CONFIG_PHY_CONTROL
    Post 12 - FSB_CONFIG_RX_STATE
    Post 13 - FSB_CONFIG_TX_STATE
    Post 14 - FSB_CONFIG_TX_CREDITS
    Post 15 - FETCH_OFFSET
    Post 16 - FETCH_HEADER
    Post 17 - VERIFY_HEADER
    Post 18 - FETCH_CONTENTS
    Post 19 - HMACSHA_COMPUTE
    Post 1A - RC4_INITIALIZE
    Post 1B - RC4_DECRYPT
    Post 1C - SHA_COMPUTE
    Post 1D - SIG_VERIFY
    Post 1E - BRANCH
    Post 20 - CB entry point reached
    Post 21 - INIT_SECOTP
    Post 22 - INIT_SECENG
    Post 03
    Post 01
    Post 03
    Post 01
    Post 03
    Post 03
    Post 01
    Post 33 - FETCH_CONTENTS_4BL_CD
    Post 03
    Post 01
    Post 03
    Post 01
    Post 03
    Post 01
    Post 01
    Post 03
    Post 03
    Post 03
    Post 10 - Payload/1BL started
    Post 11 - FSB_CONFIG_PHY_CONTROL
    Post 12 - FSB_CONFIG_RX_STATE
    Post 13 - FSB_CONFIG_TX_STATE
    Post 14 - FSB_CONFIG_TX_CREDITS
    Post 15 - FETCH_OFFSET
    Post 19 - HMACSHA_COMPUTE
    Post 1B - RC4_DECRYPT
    Post 1C - SHA_COMPUTE
    Post 1D - SIG_VERIFY
    Post 1E - BRANCH
    Post 20 - CB entry point reached
    Post 21 - INIT_SECOTP
    Post 22 - INIT_SECENG
    Post 03
    Post 01
    Post 03
    Post 01
    Post 01
    Post 03
    Post 01
    Post 03
    Post 01
    Post 03
    Post 01
    Post 01
    Post 03
    Post 01
    Post 01
    Post 03
    Post 03
    Post 01
    Post 03
    Post 03
    Post 03
    Post 03
    Most Fails(cumulative): 0x22
    Shutdown
    Phat Selected
    Version: 10
    Power Up
    Waiting for POST to change
    Post 7F
    Post 40 - Entrypoint of CD reached
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 1B - RC4_DECRYPT
    Post 1C - SHA_COMPUTE
    Post 1D - SIG_VERIFY
    Post 1E - BRANCH
    Post 20 - CB entry point reached
    Post 21 - INIT_SECOTP
    Post 22 - INIT_SECENG
    Post 01
    Post 03
    Post 01
    Post 01
    Post 01
    Post 03
    Post 03
    Post 01
    Post 03
    Post 03
    Post 01
    Post 03
    Post 01
    Post 01
    Post 03
    Post 03
    Post 01
    Post 10 - Payload/1BL started
    Post 11 - FSB_CONFIG_PHY_CONTROL
    Post 12 - FSB_CONFIG_RX_STATE
    Post 13 - FSB_CONFIG_TX_STATE
    Post 14 - FSB_CONFIG_TX_CREDITS
    Post 15 - FETCH_OFFSET
    Post 16 - FETCH_HEADER
    Post 17 - VERIFY_HEADER
    Post 18 - FETCH_CONTENTS
    Post 19 - HMACSHA_COMPUTE
    Post 1A - RC4_INITIALIZE
    Post 1B - RC4_DECRYPT
    Post 1C - SHA_COMPUTE
    Post 1D - SIG_VERIFY
    Post 1E - BRANCH
    Post 20 - CB entry point reached
    Post 21 - INIT_SECOTP
    Post 22 - INIT_SECENG
    Post 03
    Post 03
    Post 01
    Post 01
    Post 03
    Post 03
    Post 01
    Post 03
    Post 03
    Post 01
    Post 01
    Post 03
    Post 03
    Post 01
    Post 03
    Post 01
    Post 03
    Post 03
    Post 03
    Post 03
    Post 01
    Post 03
    Post 03
    Post 03
    Post 01
    Post 03
    Post 03
    Post 01
    Post 03
    Post 01
    Post 03
    Post 03
    Post 03
    Post 03
    Most Fails(cumulative): 0x22
    Shutdown
    Phat Selected
    Version: 10
    Power Up
    Waiting for POST to change
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 01
    Post 7F
    Post 7F
    Post 4F - VERIFY_OFFSET_6BL_CF
    Post 7F
    Post 7F
    Post 7F
    Post 1B - RC4_DECRYPT
    Post 1C - SHA_COMPUTE
    Post 1D - SIG_VERIFY
    Post 1E - BRANCH
    Post 20 - CB entry point reached
    Post 21 - INIT_SECOTP
    Post 87 - Panic - ALIGNMENT
    Post 01
    Post 01
    Post 01
    Post 03
    Post 03
    Post 01
    Post 03
    Post 01
    Post 03
    Post 01
    Post 03
    Post 03
    Post BF
    Post 03
    Post 01
    Post 03
    Post E0
    Post 10 - Payload/1BL started
    Post 11 - FSB_CONFIG_PHY_CONTROL
    Post 12 - FSB_CONFIG_RX_STATE
    Post 13 - FSB_CONFIG_TX_STATE
    Post 14 - FSB_CONFIG_TX_CREDITS
    Post 15 - FETCH_OFFSET
    Post 16 - FETCH_HEADER
    Post 18 - FETCH_CONTENTS
    Post 19 - HMACSHA_COMPUTE
    Post 1A - RC4_INITIALIZE
    Post 1B - RC4_DECRYPT
    Post 1C - SHA_COMPUTE
    Post 1D - SIG_VERIFY
    Post 1E - BRANCH
    Post 20 - CB entry point reached
    Post 21 - INIT_SECOTP
    Post 22 - INIT_SECENG
    Post 2F - RELOCATE
    Post 2E - HWINIT
    Post 31 - FETCH_HEADER_4BL_CD
    Post 33 - FETCH_CONTENTS_4BL_CD
    Post 34 - HMACSHA_COMPUTE_4BL_CD
    Post 35 - RC4_INITIALIZE_4BL_CD
    Post 36 - RC4_DECRYPT_4BL_CD
    Post 37 - SHA_COMPUTE_4BL_CD
    Post 3A - BRANCH
    Post 40 - Entrypoint of CD reached
    Post 41 - VERIFY_OFFSET
    Post 44 - FETCH_CONTENTS
    Post 45 - HMACSHA_COMPUTE
    Post 46 - RC4_INITIALIZE
    Post 47 - RC4_DECRYPT
    Post 48 - SHA_COMPUTE
    Post 4B - LZX_EXPAND
    Post 4E - FETCH_OFFSET_6BL_CF
    Post 4F - VERIFY_OFFSET_6BL_CF
    Post 51 - LOAD_UPDATE_2
    Post 50 - LOAD_UPDATE_1
    Post 52 - BRANCH
    Post 58 - INIT_HYPERVISOR
    Post 59 - INIT_SOC_MMIO
    Post 5A - INIT_XEX_TRAINING
    Post 61 - INIT_HAL_PHASE_0
    Post 62 - INIT_PROCESS_OBJECTS
    Post 64 - INIT_MEMORY_MANAGER
    Post 65 - INIT_STACKS
    Post 66 - INIT_OBJECT_SYSTEM
    Post 67 - INIT_PHASE1_THREAD
    Post 68 - Started phase 1 Initialization + INIT_PROCESSORS
    Post 69 - INIT_KEY_VAULT
    Post 6A - INIT_HAL_PHASE_1
    Post 6B - INIT_SFC_DRIVER
    Post 10 - Payload/1BL started
    Post 11 - FSB_CONFIG_PHY_CONTROL
    Post 10 - Payload/1BL started
    Post 11 - FSB_CONFIG_PHY_CONTROL
    Post 12 - FSB_CONFIG_RX_STATE
    Post 13 - FSB_CONFIG_TX_STATE
    Post 14 - FSB_CONFIG_TX_CREDITS
    Post 16 - FETCH_HEADER
    Post 1B - RC4_DECRYPT
    Post 1C - SHA_COMPUTE
    Post 1D - SIG_VERIFY
    Post 1E - BRANCH
    Post 20 - CB entry point reached
    Post 21 - INIT_SECOTP
    Post 22 - INIT_SECENG
    Post 2F - RELOCATE
    Post 23 - INIT_SYSRAM
    Post 31 - FETCH_HEADER_4BL_CD
    Post 33 - FETCH_CONTENTS_4BL_CD
    Post 34 - HMACSHA_COMPUTE_4BL_CD
    Post 44 - FETCH_CONTENTS
    Post 45 - HMACSHA_COMPUTE
    Post 47 - RC4_DECRYPT
    Post 4B - LZX_EXPAND
    Post 4D - DECODE_FUSES
    Post 4E - FETCH_OFFSET_6BL_CF
    Post 4F - VERIFY_OFFSET_6BL_CF
    Post 51 - LOAD_UPDATE_2
    Post 52 - BRANCH
    Post 59 - INIT_SOC_MMIO
    Post 5A - INIT_XEX_TRAINING
    Post 5B - INIT_KEYRING
    Post 5C - INIT_KEYS
    Post 5F
    Post 61 - INIT_HAL_PHASE_0
    Post 62 - INIT_PROCESS_OBJECTS
    Post 63 - INIT_KERNEL_DEBUGGER
    Post 64 - INIT_MEMORY_MANAGER
    Post 65 - INIT_STACKS
    Post 66 - INIT_OBJECT_SYSTEM
    Post 67 - INIT_PHASE1_THREAD
    Post 68 - Started phase 1 Initialization + INIT_PROCESSORS
    Shutdown
    Power Up
    Waiting for POST to change
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 1B - RC4_DECRYPT
    Post 1C - SHA_COMPUTE
    Post 1D - SIG_VERIFY
    Post 1E - BRANCH
    Post 20 - CB entry point reached
    Post 21 - INIT_SECOTP
    Post 22 - INIT_SECENG
    Post 2F - RELOCATE
    Post 2E - HWINIT
    Post 31 - FETCH_HEADER_4BL_CD
    Post 33 - FETCH_CONTENTS_4BL_CD
    Post 34 - HMACSHA_COMPUTE_4BL_CD
    Post 35 - RC4_INITIALIZE_4BL_CD
    Post 36 - RC4_DECRYPT_4BL_CD
    Post 37 - SHA_COMPUTE_4BL_CD
    Post 3A - BRANCH
    Post 40 - Entrypoint of CD reached
    Post 44 - FETCH_CONTENTS
    Post 45 - HMACSHA_COMPUTE
    Post 46 - RC4_INITIALIZE
    Post 47 - RC4_DECRYPT
    Post 48 - SHA_COMPUTE
    Post 4B - LZX_EXPAND
    Post 4E - FETCH_OFFSET_6BL_CF
    Post 4F - VERIFY_OFFSET_6BL_CF
    Post 51 - LOAD_UPDATE_2
    Post 50 - LOAD_UPDATE_1
    Post 52 - BRANCH
    Post 58 - INIT_HYPERVISOR
    Post 5A - INIT_XEX_TRAINING
    Post 60 - INIT_KERNEL
    Post 61 - INIT_HAL_PHASE_0
    Post 63 - INIT_KERNEL_DEBUGGER
    Post 64 - INIT_MEMORY_MANAGER
    Post 65 - INIT_STACKS
    Post 66 - INIT_OBJECT_SYSTEM
    Post 67 - INIT_PHASE1_THREAD
    Post 68 - Started phase 1 Initialization + INIT_PROCESSORS
    Post 69 - INIT_KEY_VAULT
    Post 6A - INIT_HAL_PHASE_1
    Post 6B - INIT_SFC_DRIVER
    Post 10 - Payload/1BL started
    Post 11 - FSB_CONFIG_PHY_CONTROL
    Post 10 - Payload/1BL started
    Post 11 - FSB_CONFIG_PHY_CONTROL
    Post 12 - FSB_CONFIG_RX_STATE
    Post 13 - FSB_CONFIG_TX_STATE
    Post 15 - FETCH_OFFSET
    Post 16 - FETCH_HEADER
    Post 18 - FETCH_CONTENTS
    Post 19 - HMACSHA_COMPUTE
    Post 1B - RC4_DECRYPT
    Post 1C - SHA_COMPUTE
    Post 1D - SIG_VERIFY
    Post 1E - BRANCH
    Post 20 - CB entry point reached
    Post 21 - INIT_SECOTP
    Post 22 - INIT_SECENG
    Post 2F - RELOCATE
    Post 23 - INIT_SYSRAM
    Post 31 - FETCH_HEADER_4BL_CD
    Post 44 - FETCH_CONTENTS
    Post 45 - HMACSHA_COMPUTE
    Post 46 - RC4_INITIALIZE
    Post 47 - RC4_DECRYPT
    Post 48 - SHA_COMPUTE
    Post 4B - LZX_EXPAND
    Post 4D - DECODE_FUSES
    Post 4E - FETCH_OFFSET_6BL_CF
    Post 51 - LOAD_UPDATE_2
    Post 52 - BRANCH
    Post 59 - INIT_SOC_MMIO
    Post 5A - INIT_XEX_TRAINING
    Post 5B - INIT_KEYRING
    Post 5C - INIT_KEYS
    Post 5F
    Post 60 - INIT_KERNEL
    Post 61 - INIT_HAL_PHASE_0
    Post 62 - INIT_PROCESS_OBJECTS
    Post 63 - INIT_KERNEL_DEBUGGER
    Post 64 - INIT_MEMORY_MANAGER
    Post 65 - INIT_STACKS
    Post 66 - INIT_OBJECT_SYSTEM
    Post 67 - INIT_PHASE1_THREAD
    Post 68 - Started phase 1 Initialization + INIT_PROCESSORS
    Shutdown
    Power Up
    Waiting for POST to change
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7C
    Post 7F
    Post 7F
    Post 1B - RC4_DECRYPT
    Post 1C - SHA_COMPUTE
    Post 1D - SIG_VERIFY
    Post 1E - BRANCH
    Post 20 - CB entry point reached
    Post 21 - INIT_SECOTP
    Post 22 - INIT_SECENG
    Post 03
    Post 03
    Post 03
    Post 03
    Post 03
    Post 03
    Post 03
    Post 03
    Post 03
    Post 03
    Post 03
    Post 03
    Post 03
    Post 10 - Payload/1BL started
    Post 11 - FSB_CONFIG_PHY_CONTROL
    Post 12 - FSB_CONFIG_RX_STATE
    Post 13 - FSB_CONFIG_TX_STATE
    Post 14 - FSB_CONFIG_TX_CREDITS
    Post 15 - FETCH_OFFSET
    Post 16 - FETCH_HEADER
    Post 17 - VERIFY_HEADER
    Post 18 - FETCH_CONTENTS
    Post 19 - HMACSHA_COMPUTE
    Post 1A - RC4_INITIALIZE
    Post 1B - RC4_DECRYPT
    Post 1C - SHA_COMPUTE
    Post 1D - SIG_VERIFY
    Post 1E - BRANCH
    Post 20 - CB entry point reached
    Post 21 - INIT_SECOTP
    Post 22 - INIT_SECENG
    Post 2F - RELOCATE
    Post 2E - HWINIT
    Post 31 - FETCH_HEADER_4BL_CD
    Post 33 - FETCH_CONTENTS_4BL_CD
    Post 34 - HMACSHA_COMPUTE_4BL_CD
    Post 35 - RC4_INITIALIZE_4BL_CD
    Post 36 - RC4_DECRYPT_4BL_CD
    Post 37 - SHA_COMPUTE_4BL_CD
    Post 3A - BRANCH
    Post 40 - Entrypoint of CD reached
    Post 42 - FETCH_HEADER
    Post 44 - FETCH_CONTENTS
    Post 45 - HMACSHA_COMPUTE
    Post 46 - RC4_INITIALIZE
    Post 47 - RC4_DECRYPT
    Post 48 - SHA_COMPUTE
    Post 49 - SHA_VERIFY
    Post 4B - LZX_EXPAND
    Post 4E - FETCH_OFFSET_6BL_CF
    Post 4F - VERIFY_OFFSET_6BL_CF
    Post 51 - LOAD_UPDATE_2
    Post 50 - LOAD_UPDATE_1
    Post 52 - BRANCH
    Post 58 - INIT_HYPERVISOR
    Post 5A - INIT_XEX_TRAINING
    Post 61 - INIT_HAL_PHASE_0
    Post 62 - INIT_PROCESS_OBJECTS
    Post 63 - INIT_KERNEL_DEBUGGER
    Post 64 - INIT_MEMORY_MANAGER
    Post 65 - INIT_STACKS
    Post 66 - INIT_OBJECT_SYSTEM
    Post 67 - INIT_PHASE1_THREAD
    Post 68 - Started phase 1 Initialization + INIT_PROCESSORS
    Post 69 - INIT_KEY_VAULT
    Post 6A - INIT_HAL_PHASE_1
    Post 6B - INIT_SFC_DRIVER
    Post 10 - Payload/1BL started
    Post 11 - FSB_CONFIG_PHY_CONTROL
    Post 10 - Payload/1BL started
    Post 11 - FSB_CONFIG_PHY_CONTROL
    Post 12 - FSB_CONFIG_RX_STATE
    Post 13 - FSB_CONFIG_TX_STATE
    Post 18 - FETCH_CONTENTS
    Post 1B - RC4_DECRYPT
    Post 1C - SHA_COMPUTE
    Post 1D - SIG_VERIFY
    Post 1E - BRANCH
    Post 20 - CB entry point reached
    Post 21 - INIT_SECOTP
    Post 22 - INIT_SECENG
    Post 2F - RELOCATE
    Post 23 - INIT_SYSRAM
    Post 31 - FETCH_HEADER_4BL_CD
    Post 33 - FETCH_CONTENTS_4BL_CD
    Post 44 - FETCH_CONTENTS
    Post 45 - HMACSHA_COMPUTE
    Post 47 - RC4_DECRYPT
    Post 4B - LZX_EXPAND
    Post 4D - DECODE_FUSES
    Post 4E - FETCH_OFFSET_6BL_CF
    Post 4F - VERIFY_OFFSET_6BL_CF
    Post 51 - LOAD_UPDATE_2
    Post 52 - BRANCH
    Post 59 - INIT_SOC_MMIO
    Post 5A - INIT_XEX_TRAINING
    Post 5B - INIT_KEYRING
    Post 5C - INIT_KEYS
    Post 5F
    Post 61 - INIT_HAL_PHASE_0
    Post 62 - INIT_PROCESS_OBJECTS
    Post 63 - INIT_KERNEL_DEBUGGER
    Post 64 - INIT_MEMORY_MANAGER
    Post 66 - INIT_OBJECT_SYSTEM
    Post 67 - INIT_PHASE1_THREAD
    Post 68 - Started phase 1 Initialization + INIT_PROCESSORS
    Shutdown
    Power Up
    Waiting for POST to change
    Post 07
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 1B - RC4_DECRYPT
    Post 1C - SHA_COMPUTE
    Post 1D - SIG_VERIFY
    Post 1E - BRANCH
    Post 20 - CB entry point reached
    Post 21 - INIT_SECOTP
    Post 22 - INIT_SECENG
    Post 03
    Post 03
    Post 03
    Post 03
    Post 03
    Post 03
    Post 03
    Post 03
    Post 03
    Post 03
    Post 03
    Post 03
    Post 03
    Post 10 - Payload/1BL started
    Post 11 - FSB_CONFIG_PHY_CONTROL
    Post 12 - FSB_CONFIG_RX_STATE
    Post 13 - FSB_CONFIG_TX_STATE
    Post 14 - FSB_CONFIG_TX_CREDITS
    Post 15 - FETCH_OFFSET
    Post 16 - FETCH_HEADER
    Post 17 - VERIFY_HEADER
    Post 18 - FETCH_CONTENTS
    Post 19 - HMACSHA_COMPUTE
    Post 1A - RC4_INITIALIZE
    Post 1B - RC4_DECRYPT
    Post 1C - SHA_COMPUTE
    Post 1D - SIG_VERIFY
    Post 1E - BRANCH
    Post 20 - CB entry point reached
    Post 21 - INIT_SECOTP
    Post 22 - INIT_SECENG
    Post 2F - RELOCATE
    Post 2E - HWINIT
    Post 33 - FETCH_CONTENTS_4BL_CD
    Post 34 - HMACSHA_COMPUTE_4BL_CD
    Post 35 - RC4_INITIALIZE_4BL_CD
    Post 36 - RC4_DECRYPT_4BL_CD
    Post 37 - SHA_COMPUTE_4BL_CD
    Post 3A - BRANCH
    Post 40 - Entrypoint of CD reached
    Post 44 - FETCH_CONTENTS
    Post 45 - HMACSHA_COMPUTE
    Post 46 - RC4_INITIALIZE
    Post 47 - RC4_DECRYPT
    Post 48 - SHA_COMPUTE
    Post 4B - LZX_EXPAND
    Post 4E - FETCH_OFFSET_6BL_CF
    Post 4F - VERIFY_OFFSET_6BL_CF
    Post 51 - LOAD_UPDATE_2
    Post 50 - LOAD_UPDATE_1
    Post 52 - BRANCH
    Post 58 - INIT_HYPERVISOR
    Post 5A - INIT_XEX_TRAINING
    Post 61 - INIT_HAL_PHASE_0
    Post 64 - INIT_MEMORY_MANAGER
    Post 65 - INIT_STACKS
    Post 66 - INIT_OBJECT_SYSTEM
    Post 67 - INIT_PHASE1_THREAD
    Post 68 - Started phase 1 Initialization + INIT_PROCESSORS
    Post 69 - INIT_KEY_VAULT
    Post 6A - INIT_HAL_PHASE_1
    Post 6B - INIT_SFC_DRIVER
    Post 10 - Payload/1BL started
    Post 11 - FSB_CONFIG_PHY_CONTROL
    Post 10 - Payload/1BL started
    Post 11 - FSB_CONFIG_PHY_CONTROL
    Post 12 - FSB_CONFIG_RX_STATE
    Post 13 - FSB_CONFIG_TX_STATE
    Post 15 - FETCH_OFFSET
    Post 16 - FETCH_HEADER
    Post 18 - FETCH_CONTENTS
    Post 19 - HMACSHA_COMPUTE
    Post 1A - RC4_INITIALIZE
    Post 1B - RC4_DECRYPT
    Post 1C - SHA_COMPUTE
    Post 1D - SIG_VERIFY
    Post 1E - BRANCH
    Post 20 - CB entry point reached
    Post 21 - INIT_SECOTP
    Post 22 - INIT_SECENG
    Post 2F - RELOCATE
    Post 23 - INIT_SYSRAM
    Post 31 - FETCH_HEADER_4BL_CD
    Post 33 - FETCH_CONTENTS_4BL_CD
    Post 34 - HMACSHA_COMPUTE_4BL_CD
    Post 44 - FETCH_CONTENTS
    Post 45 - HMACSHA_COMPUTE
    Post 46 - RC4_INITIALIZE
    Post 47 - RC4_DECRYPT
    Post 4B - LZX_EXPAND
    Post 4D - DECODE_FUSES
    Post 4E - FETCH_OFFSET_6BL_CF
    Post 4F - VERIFY_OFFSET_6BL_CF
    Post 51 - LOAD_UPDATE_2
    Post 52 - BRANCH
    Post 59 - INIT_SOC_MMIO
    Post 5A - INIT_XEX_TRAINING
    Post 5B - INIT_KEYRING
    Post 5C - INIT_KEYS
    Post 5F
    Post 60 - INIT_KERNEL
    Post 61 - INIT_HAL_PHASE_0
    Post 63 - INIT_KERNEL_DEBUGGER
    Post 64 - INIT_MEMORY_MANAGER
    Post 65 - INIT_STACKS
    Post 66 - INIT_OBJECT_SYSTEM
    Post 67 - INIT_PHASE1_THREAD
    Post 68 - Started phase 1 Initialization + INIT_PROCESSORS
    Shutdown
    Power Up
    Waiting for POST to change
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 1B - RC4_DECRYPT
    Post 1C - SHA_COMPUTE
    Post 1D - SIG_VERIFY
    Post 1E - BRANCH
    Post 20 - CB entry point reached
    Post 21 - INIT_SECOTP
    Post 22 - INIT_SECENG
    Post 03
    Post 03
    Post 03
    Post 01
    Post 03
    Post 03
    Post 01
    Post 03
    Post 01
    Post 03
    Post 03
    Post 03
    Post 03
    Post 01
    Post 03
    Post 10 - Payload/1BL started
    Post 11 - FSB_CONFIG_PHY_CONTROL
    Post 12 - FSB_CONFIG_RX_STATE
    Post 13 - FSB_CONFIG_TX_STATE
    Post 14 - FSB_CONFIG_TX_CREDITS
    Post 15 - FETCH_OFFSET
    Post 16 - FETCH_HEADER
    Post 17 - VERIFY_HEADER
    Post 18 - FETCH_CONTENTS
    Post 19 - HMACSHA_COMPUTE
    Post 1A - RC4_INITIALIZE
    Post 1B - RC4_DECRYPT
    Post 1C - SHA_COMPUTE
    Post 1D - SIG_VERIFY
    Post 1E - BRANCH
    Post 20 - CB entry point reached
    Post 21 - INIT_SECOTP
    Post 22 - INIT_SECENG
    Post 03
    Post 03
    Post 03
    Post 03
    Post 03
    Post 03
    Post 03
    Post 03
    Post 03
    Post 03
    Post 03
    Post 03
    Post 03
    Post 03
    Post 10 - Payload/1BL started
    Post 11 - FSB_CONFIG_PHY_CONTROL
    Post 12 - FSB_CONFIG_RX_STATE
    Post 13 - FSB_CONFIG_TX_STATE
    Post 14 - FSB_CONFIG_TX_CREDITS
    Post 15 - FETCH_OFFSET
    Post 16 - FETCH_HEADER
    Post 17 - VERIFY_HEADER
    Post 18 - FETCH_CONTENTS
    Post 19 - HMACSHA_COMPUTE
    Post 1A - RC4_INITIALIZE
    Post 1B - RC4_DECRYPT
    Post 1C - SHA_COMPUTE
    Post 1D - SIG_VERIFY
    Post 1E - BRANCH
    Post 20 - CB entry point reached
    Post 21 - INIT_SECOTP
    Post 22 - INIT_SECENG
    Post 2F - RELOCATE
    Post 2E - HWINIT
    Post 31 - FETCH_HEADER_4BL_CD
    Post 33 - FETCH_CONTENTS_4BL_CD
    Post 34 - HMACSHA_COMPUTE_4BL_CD
    Post 35 - RC4_INITIALIZE_4BL_CD
    Post 36 - RC4_DECRYPT_4BL_CD
    Post 37 - SHA_COMPUTE_4BL_CD
    Post 3A - BRANCH
    Post 40 - Entrypoint of CD reached
    Post 41 - VERIFY_OFFSET
    Post 44 - FETCH_CONTENTS
    Post 45 - HMACSHA_COMPUTE
    Post 46 - RC4_INITIALIZE
    Post 47 - RC4_DECRYPT
    Post 48 - SHA_COMPUTE
    Post 4B - LZX_EXPAND
    Post 4E - FETCH_OFFSET_6BL_CF
    Post 4F - VERIFY_OFFSET_6BL_CF
    Post 51 - LOAD_UPDATE_2
    Post 03
    Post 03
    Post 03
    Post 03
    Post 01
    Post 03
    Post 03
    Post 03
    Post 11 - FSB_CONFIG_PHY_CONTROL
    Post 15 - FETCH_OFFSET
    Post 1B - RC4_DECRYPT
    Post 1C - SHA_COMPUTE
    Post 1D - SIG_VERIFY
    Post 1E - BRANCH
    Post 20 - CB entry point reached
    Post 21 - INIT_SECOTP
    Post 22 - INIT_SECENG
    Post 03
    Post 01
    Post 01
    Post 03
    Post 01
    Post 03
    Post 01
    Post 03
    Post 01
    Post 03
    Post 01
    Post 23 - INIT_SYSRAM
    Post 03
    Post 03
    Post 01
    Post 03
    Post 03
    Post 01
    Post 10 - Payload/1BL started
    Post 11 - FSB_CONFIG_PHY_CONTROL
    Post 12 - FSB_CONFIG_RX_STATE
    Post 13 - FSB_CONFIG_TX_STATE
    Post 14 - FSB_CONFIG_TX_CREDITS
    Post 15 - FETCH_OFFSET
    Post 16 - FETCH_HEADER
    Post 17 - VERIFY_HEADER
    Post 18 - FETCH_CONTENTS
    Post 19 - HMACSHA_COMPUTE
    Post 1B - RC4_DECRYPT
    Post 1C - SHA_COMPUTE
    Post 1D - SIG_VERIFY
    Post 1E - BRANCH
    Post 20 - CB entry point reached
    Post 21 - INIT_SECOTP
    Post 22 - INIT_SECENG
    Post 01
    Post 01
    Post 03
    Post 03
    Post 03
    Post 01
    Post 03
    Post 03
    Post 01
    Post 03
    Post 03
    Post 01
    Post 03
    Post 03
    Post 03
    Post 03
    Post 10 - Payload/1BL started
    Post 11 - FSB_CONFIG_PHY_CONTROL
    Post 12 - FSB_CONFIG_RX_STATE
    Post 13 - FSB_CONFIG_TX_STATE
    Post 14 - FSB_CONFIG_TX_CREDITS
    Post 15 - FETCH_OFFSET
    Post 16 - FETCH_HEADER
    Post 18 - FETCH_CONTENTS
    Post 19 - HMACSHA_COMPUTE
    Post 1A - RC4_INITIALIZE
    Post 1B - RC4_DECRYPT
    Post 1C - SHA_COMPUTE
    Post 1D - SIG_VERIFY
    Post 1E - BRANCH
    Post 20 - CB entry point reached
    Post 21 - INIT_SECOTP
    Post 22 - INIT_SECENG
    Post 03
    Post 03
    Post 03
    Post 03
    Post 01
    Post 03
    Post 03
    Post 01
    Post 01
    Post 03
    Post 01
    Post 03
    Post 01
    Post 03
    Post 03
    Post 03
    Post 01
    Post 03
    Post 01
    Post 03
    Post 03
    Post 03
    Post 03
    Post 03
    Most Fails(cumulative): 0x22
    Shutdown
    Phat Selected
    Version: 10
    Power Up
    Waiting for POST to change
    Post 7F
    Post 7F
    Post 4F - VERIFY_OFFSET_6BL_CF
    Post 4F - VERIFY_OFFSET_6BL_CF
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 1B - RC4_DECRYPT
    Post 1C - SHA_COMPUTE
    Post 1D - SIG_VERIFY
    Post 1E - BRANCH
    Post 20 - CB entry point reached
    Post 21 - INIT_SECOTP
    Post 22 - INIT_SECENG
    Post 01
    Post 03
    Post 03
    Post 03
    Post 03
    Post 03
    Post 03
    Post 03
    Post 03
    Post 03
    Post 03
    Post 03
    Post 03
    Post 03
    Post 10 - Payload/1BL started
    Post 11 - FSB_CONFIG_PHY_CONTROL
    Post 12 - FSB_CONFIG_RX_STATE
    Post 13 - FSB_CONFIG_TX_STATE
    Post 14 - FSB_CONFIG_TX_CREDITS
    Post 15 - FETCH_OFFSET
    Post 16 - FETCH_HEADER
    Post 17 - VERIFY_HEADER
    Post 18 - FETCH_CONTENTS
    Post 19 - HMACSHA_COMPUTE
    Post 1A - RC4_INITIALIZE
    Post 1B - RC4_DECRYPT
    Post 1C - SHA_COMPUTE
    Post 1D - SIG_VERIFY
    Post 1E - BRANCH
    Post 20 - CB entry point reached
    Post 21 - INIT_SECOTP
    Post 22 - INIT_SECENG
    Post 2F - RELOCATE
    Post 2E - HWINIT
    Post 33 - FETCH_CONTENTS_4BL_CD
    Post 34 - HMACSHA_COMPUTE_4BL_CD
    Post 35 - RC4_INITIALIZE_4BL_CD
    Post 36 - RC4_DECRYPT_4BL_CD
    Post 37 - SHA_COMPUTE_4BL_CD
    Post 3A - BRANCH
    Post 40 - Entrypoint of CD reached
    Post 44 - FETCH_CONTENTS
    Post 45 - HMACSHA_COMPUTE
    Post 46 - RC4_INITIALIZE
    Post 47 - RC4_DECRYPT
    Post 48 - SHA_COMPUTE
    Post 4B - LZX_EXPAND
    Post 4E - FETCH_OFFSET_6BL_CF
    Post 4F - VERIFY_OFFSET_6BL_CF
    Post 51 - LOAD_UPDATE_2
    Post 50 - LOAD_UPDATE_1
    Post 52 - BRANCH
    Post 58 - INIT_HYPERVISOR
    Post 5A - INIT_XEX_TRAINING
    Post 60 - INIT_KERNEL
    Post 61 - INIT_HAL_PHASE_0
    Post 62 - INIT_PROCESS_OBJECTS
    Post 64 - INIT_MEMORY_MANAGER
    Post 65 - INIT_STACKS
    Post 66 - INIT_OBJECT_SYSTEM
    Post 67 - INIT_PHASE1_THREAD
    Post 68 - Started phase 1 Initialization + INIT_PROCESSORS
    Post 69 - INIT_KEY_VAULT
    Post 6A - INIT_HAL_PHASE_1
    Post 6B - INIT_SFC_DRIVER
    Post 10 - Payload/1BL started
    Post 11 - FSB_CONFIG_PHY_CONTROL
    Post 10 - Payload/1BL started
    Post 11 - FSB_CONFIG_PHY_CONTROL
    Post 12 - FSB_CONFIG_RX_STATE
    Post 13 - FSB_CONFIG_TX_STATE
    Post 16 - FETCH_HEADER
    Post 17 - VERIFY_HEADER
    Post 18 - FETCH_CONTENTS
    Post 19 - HMACSHA_COMPUTE
    Post 1B - RC4_DECRYPT
    Post 1C - SHA_COMPUTE
    Post 1D - SIG_VERIFY
    Post 1E - BRANCH
    Post 20 - CB entry point reached
    Post 21 - INIT_SECOTP
    Post 22 - INIT_SECENG
    Post 2F - RELOCATE
    Post 23 - INIT_SYSRAM
    Post 31 - FETCH_HEADER_4BL_CD
    Post 44 - FETCH_CONTENTS
    Post 45 - HMACSHA_COMPUTE
    Post 46 - RC4_INITIALIZE
    Post 47 - RC4_DECRYPT
    Post 48 - SHA_COMPUTE
    Post 4B - LZX_EXPAND
    Post 4D - DECODE_FUSES
    Post 51 - LOAD_UPDATE_2
    Post 52 - BRANCH
    Post 59 - INIT_SOC_MMIO
    Post 5A - INIT_XEX_TRAINING
    Post 5B - INIT_KEYRING
    Post 5C - INIT_KEYS
    Post 5F
    Post 60 - INIT_KERNEL
    Post 61 - INIT_HAL_PHASE_0
    Post 62 - INIT_PROCESS_OBJECTS
    Post 63 - INIT_KERNEL_DEBUGGER
    Post 64 - INIT_MEMORY_MANAGER
    Post 65 - INIT_STACKS
    Post 66 - INIT_OBJECT_SYSTEM
    Post 67 - INIT_PHASE1_THREAD
    Post 68 - Started phase 1 Initialization + INIT_PROCESSORS
    Shutdown
    Power Up
    Waiting for POST to change
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 1B - RC4_DECRYPT
    Post 1C - SHA_COMPUTE
    Post 1D - SIG_VERIFY
    Post 1E - BRANCH
    Post 20 - CB entry point reached
    Post 21 - INIT_SECOTP
    Post 22 - INIT_SECENG
    Post 03
    Post 03
    Post 01
    Post 03
    Post 01
    Post 03
    Post 01
    Post 03
    Post 03
    Post 03
    Post 01
    Post 03
    Post 03
    Post 03
    Post 03
    Post 10 - Payload/1BL started
    Post 11 - FSB_CONFIG_PHY_CONTROL
    Post 12 - FSB_CONFIG_RX_STATE
    Post 13 - FSB_CONFIG_TX_STATE
    Post 14 - FSB_CONFIG_TX_CREDITS
    Post 15 - FETCH_OFFSET
    Post 16 - FETCH_HEADER
    Post 17 - VERIFY_HEADER
    Post 18 - FETCH_CONTENTS
    Post 19 - HMACSHA_COMPUTE
    Post 1A - RC4_INITIALIZE
    Post 1B - RC4_DECRYPT
    Post 1C - SHA_COMPUTE
    Post 1D - SIG_VERIFY
    Post 1E - BRANCH
    Post 20 - CB entry point reached
    Post 21 - INIT_SECOTP
    Post 22 - INIT_SECENG
    Post 2F - RELOCATE
    Post 2E - HWINIT
    Post 31 - FETCH_HEADER_4BL_CD
    Post 33 - FETCH_CONTENTS_4BL_CD
    Post 34 - HMACSHA_COMPUTE_4BL_CD
    Post 35 - RC4_INITIALIZE_4BL_CD
    Post 36 - RC4_DECRYPT_4BL_CD
    Post 37 - SHA_COMPUTE_4BL_CD
    Post 3A - BRANCH
    Post 40 - Entrypoint of CD reached
    Post 42 - FETCH_HEADER
    Post 44 - FETCH_CONTENTS
    Post 45 - HMACSHA_COMPUTE
    Post 46 - RC4_INITIALIZE
    Post 47 - RC4_DECRYPT
    Post 48 - SHA_COMPUTE
    Post 4B - LZX_EXPAND
    Post 4E - FETCH_OFFSET_6BL_CF
    Post 4F - VERIFY_OFFSET_6BL_CF
    Post 51 - LOAD_UPDATE_2
    Post 50 - LOAD_UPDATE_1
    Post 52 - BRANCH
    Post 58 - INIT_HYPERVISOR
    Post 5A - INIT_XEX_TRAINING
    Post 61 - INIT_HAL_PHASE_0
    Post 63 - INIT_KERNEL_DEBUGGER
    Post 64 - INIT_MEMORY_MANAGER
    Post 65 - INIT_STACKS
    Post 66 - INIT_OBJECT_SYSTEM
    Post 67 - INIT_PHASE1_THREAD
    Post 68 - Started phase 1 Initialization + INIT_PROCESSORS
    Post 69 - INIT_KEY_VAULT
    Post 6A - INIT_HAL_PHASE_1
    Post 6B - INIT_SFC_DRIVER
    Post 10 - Payload/1BL started
    Post 11 - FSB_CONFIG_PHY_CONTROL
    Post 10 - Payload/1BL started
    Post 11 - FSB_CONFIG_PHY_CONTROL
    Post 12 - FSB_CONFIG_RX_STATE
    Post 13 - FSB_CONFIG_TX_STATE
    Post 16 - FETCH_HEADER
    Post 18 - FETCH_CONTENTS
    Post 1B - RC4_DECRYPT
    Post 1C - SHA_COMPUTE
    Post 1D - SIG_VERIFY
    Post 1E - BRANCH
    Post 20 - CB entry point reached
    Post 21 - INIT_SECOTP
    Post 22 - INIT_SECENG
    Post 2F - RELOCATE
    Post 3B - PCI_INIT
    Post 44 - FETCH_CONTENTS
    Post 45 - HMACSHA_COMPUTE
    Post 4B - LZX_EXPAND
    Post 4D - DECODE_FUSES
    Post 51 - LOAD_UPDATE_2
    Post 52 - BRANCH
    Post 59 - INIT_SOC_MMIO
    Post 5A - INIT_XEX_TRAINING
    Post 5B - INIT_KEYRING
    Post 5C - INIT_KEYS
    Post 5F
    Post 61 - INIT_HAL_PHASE_0
    Post 62 - INIT_PROCESS_OBJECTS
    Post 63 - INIT_KERNEL_DEBUGGER
    Post 64 - INIT_MEMORY_MANAGER
    Post 65 - INIT_STACKS
    Post 66 - INIT_OBJECT_SYSTEM
    Post 67 - INIT_PHASE1_THREAD
    Post 68 - Started phase 1 Initialization + INIT_PROCESSORS
    Shutdown
    Power Up
    Waiting for POST to change
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 40 - Entrypoint of CD reached
    Post 1B - RC4_DECRYPT
    Post 1C - SHA_COMPUTE
    Post 1D - SIG_VERIFY
    Post 1E - BRANCH
    Post 20 - CB entry point reached
    Post 21 - INIT_SECOTP
    Post 22 - INIT_SECENG
    Post 01
    Post 03
    Post 01
    Post 01
    Post 03
    Post 01
    Post 01
    Post 03
    Post 01
    Post 33 - FETCH_CONTENTS_4BL_CD
    Post 03
    Post 03
    Post 01
    Post 03
    Post 01
    Post 03
    Post 01
    Post 03
    Post 10 - Payload/1BL started
    Post 11 - FSB_CONFIG_PHY_CONTROL
    Post 12 - FSB_CONFIG_RX_STATE
    Post 13 - FSB_CONFIG_TX_STATE
    Post 14 - FSB_CONFIG_TX_CREDITS
    Post 15 - FETCH_OFFSET
    Post 16 - FETCH_HEADER
    Post 17 - VERIFY_HEADER
    Post 18 - FETCH_CONTENTS
    Post 19 - HMACSHA_COMPUTE
    Post 1A - RC4_INITIALIZE
    Post 1B - RC4_DECRYPT
    Post 1C - SHA_COMPUTE
    Post 1D - SIG_VERIFY
    Post 1E - BRANCH
    Post 20 - CB entry point reached
    Post 21 - INIT_SECOTP
    Post 22 - INIT_SECENG
    Post 03
    Post 01
    Post 03
    Post 01
    Post 01
    Post 03
    Post 01
    Post 03
    Post 03
    Post 01
    Post 03
    Post 03
    Post 03
    Post 03
    Post 01
    Post 03
    Post 10 - Payload/1BL started
    Post 11 - FSB_CONFIG_PHY_CONTROL
    Post 12 - FSB_CONFIG_RX_STATE
    Post 13 - FSB_CONFIG_TX_STATE
    Post 14 - FSB_CONFIG_TX_CREDITS
    Post 15 - FETCH_OFFSET
    Post 16 - FETCH_HEADER
    Post 17 - VERIFY_HEADER
    Post 18 - FETCH_CONTENTS
    Post 19 - HMACSHA_COMPUTE
    Post 1A - RC4_INITIALIZE
    Post 1B - RC4_DECRYPT
    Post 1C - SHA_COMPUTE
    Post 1D - SIG_VERIFY
    Post 1E - BRANCH
    Post 20 - CB entry point reached
    Post 21 - INIT_SECOTP
    Post 22 - INIT_SECENG
    Post 2F - RELOCATE
    Post 2E - HWINIT
    Post 03
    Post 01
    Post 03
    Post 03
    Post 03
    Post 03
    Post 01
    Post 03
    Post 01
    Post 03
    Post 01
    Post 03
    Post 03
    Post 01
    Post 01
    Post 03
    Post 10 - Payload/1BL started
    Post 11 - FSB_CONFIG_PHY_CONTROL
    Post 12 - FSB_CONFIG_RX_STATE
    Post 13 - FSB_CONFIG_TX_STATE
    Post 14 - FSB_CONFIG_TX_CREDITS
    Post 15 - FETCH_OFFSET
    Post 16 - FETCH_HEADER
    Post 17 - VERIFY_HEADER
    Post 18 - FETCH_CONTENTS
    Post 19 - HMACSHA_COMPUTE
    Post 1A - RC4_INITIALIZE
    Post 1B - RC4_DECRYPT
    Post 1C - SHA_COMPUTE
    Post 1D - SIG_VERIFY
    Post 1E - BRANCH
    Post 20 - CB entry point reached
    Post 21 - INIT_SECOTP
    Post 22 - INIT_SECENG
    Post 2F - RELOCATE
    Post 2E - HWINIT
    Post 31 - FETCH_HEADER_4BL_CD
    Post 33 - FETCH_CONTENTS_4BL_CD
    Post 34 - HMACSHA_COMPUTE_4BL_CD
    Post 35 - RC4_INITIALIZE_4BL_CD
    Post 36 - RC4_DECRYPT_4BL_CD
    Post 37 - SHA_COMPUTE_4BL_CD
    Post 3A - BRANCH
    Post 40 - Entrypoint of CD reached
    Post 42 - FETCH_HEADER
    Post 44 - FETCH_CONTENTS
    Post 45 - HMACSHA_COMPUTE
    Post 46 - RC4_INITIALIZE
    Post 47 - RC4_DECRYPT
    Post 48 - SHA_COMPUTE
    Post 4B - LZX_EXPAND
    Post 4E - FETCH_OFFSET_6BL_CF
    Post 4F - VERIFY_OFFSET_6BL_CF
    Post 51 - LOAD_UPDATE_2
    Post 50 - LOAD_UPDATE_1
    Post 52 - BRANCH
    Post 58 - INIT_HYPERVISOR
    Post 5A - INIT_XEX_TRAINING
    Post 60 - INIT_KERNEL
    Post 61 - INIT_HAL_PHASE_0
    Post 62 - INIT_PROCESS_OBJECTS
    Post 64 - INIT_MEMORY_MANAGER
    Post 65 - INIT_STACKS
    Post 66 - INIT_OBJECT_SYSTEM
    Post 67 - INIT_PHASE1_THREAD
    Post 68 - Started phase 1 Initialization + INIT_PROCESSORS
    Post 69 - INIT_KEY_VAULT
    Post 6A - INIT_HAL_PHASE_1
    Post 6B - INIT_SFC_DRIVER
    Post 10 - Payload/1BL started
    Post 11 - FSB_CONFIG_PHY_CONTROL
    Post 10 - Payload/1BL started
    Post 11 - FSB_CONFIG_PHY_CONTROL
    Post 12 - FSB_CONFIG_RX_STATE
    Post 13 - FSB_CONFIG_TX_STATE
    Post 15 - FETCH_OFFSET
    Post 18 - FETCH_CONTENTS
    Post 1B - RC4_DECRYPT
    Post 1C - SHA_COMPUTE
    Post 1D - SIG_VERIFY
    Post 1E - BRANCH
    Post 20 - CB entry point reached
    Post 21 - INIT_SECOTP
    Post 22 - INIT_SECENG
    Post 2F - RELOCATE
    Post 23 - INIT_SYSRAM
    Post 31 - FETCH_HEADER_4BL_CD
    Post 33 - FETCH_CONTENTS_4BL_CD
    Post 3B - PCI_INIT
    Post 44 - FETCH_CONTENTS
    Post 45 - HMACSHA_COMPUTE
    Post 48 - SHA_COMPUTE
    Post 4B - LZX_EXPAND
    Post 4D - DECODE_FUSES
    Post 4E - FETCH_OFFSET_6BL_CF
    Post 51 - LOAD_UPDATE_2
    Post 52 - BRANCH
    Post 59 - INIT_SOC_MMIO
    Post 5A - INIT_XEX_TRAINING
    Post 5B - INIT_KEYRING
    Post 5C - INIT_KEYS
    Post 5F
    Post 60 - INIT_KERNEL
    Post 61 - INIT_HAL_PHASE_0
    Post 62 - INIT_PROCESS_OBJECTS
    Post 63 - INIT_KERNEL_DEBUGGER
    Post 64 - INIT_MEMORY_MANAGER
    Post 65 - INIT_STACKS
    Post 66 - INIT_OBJECT_SYSTEM
    Post 67 - INIT_PHASE1_THREAD
    Post 68 - Started phase 1 Initialization + INIT_PROCESSORS
    Most Fails(cumulative): 0x22
    Shutdown
    Power Up
    Waiting for POST to change
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 3F
    Post 1B - RC4_DECRYPT
    Post 1C - SHA_COMPUTE
    Post 1D - SIG_VERIFY
    Post 1E - BRANCH
    Post 20 - CB entry point reached
    Post 21 - INIT_SECOTP
    Post 22 - INIT_SECENG
    Post 03
    Post 01
    Post 03
    Post 03
    Post 01
    Post 03
    Post 03
    Post 01
    Post 03
    Post 03
    Post 01
    Post 03
    Post 03
    Post 01
    Post 03
    Post 03
    Post 10 - Payload/1BL started
    Post 11 - FSB_CONFIG_PHY_CONTROL
    Post 12 - FSB_CONFIG_RX_STATE
    Post 13 - FSB_CONFIG_TX_STATE
    Post 14 - FSB_CONFIG_TX_CREDITS
    Post 15 - FETCH_OFFSET
    Post 16 - FETCH_HEADER
    Post 17 - VERIFY_HEADER
    Post 18 - FETCH_CONTENTS
    Post 19 - HMACSHA_COMPUTE
    Post 1A - RC4_INITIALIZE
    Post 1B - RC4_DECRYPT
    Post 1C - SHA_COMPUTE
    Post 1D - SIG_VERIFY
    Post 1E - BRANCH
    Post 20 - CB entry point reached
    Post 21 - INIT_SECOTP
    Post 22 - INIT_SECENG
    Post 01
    Post 03
    Post 03
    Post 03
    Post 03
    Post 03
    Post 03
    Post 03
    Post 03
    Post 03
    Post 03
    Post 03
    Post 03
    Post 10 - Payload/1BL started
    Post 11 - FSB_CONFIG_PHY_CONTROL
    Post 12 - FSB_CONFIG_RX_STATE
    Post 13 - FSB_CONFIG_TX_STATE
    Post 14 - FSB_CONFIG_TX_CREDITS
    Post 15 - FETCH_OFFSET
    Post 16 - FETCH_HEADER
    Post 17 - VERIFY_HEADER
    Post 18 - FETCH_CONTENTS
    Post 19 - HMACSHA_COMPUTE
    Post 1A - RC4_INITIALIZE
    Post 1B - RC4_DECRYPT
    Post 1C - SHA_COMPUTE
    Post 1D - SIG_VERIFY
    Post 1E - BRANCH
    Post 20 - CB entry point reached
    Post 21 - INIT_SECOTP
    Post 22 - INIT_SECENG
    Post 2F - RELOCATE
    Post 2E - HWINIT
    Post 33 - FETCH_CONTENTS_4BL_CD
    Post 34 - HMACSHA_COMPUTE_4BL_CD
    Post 35 - RC4_INITIALIZE_4BL_CD
    Post 36 - RC4_DECRYPT_4BL_CD
    Post 37 - SHA_COMPUTE_4BL_CD
    Post 3A - BRANCH
    Post 40 - Entrypoint of CD reached
    Post 42 - FETCH_HEADER
    Post 44 - FETCH_CONTENTS
    Post 45 - HMACSHA_COMPUTE
    Post 46 - RC4_INITIALIZE
    Post 47 - RC4_DECRYPT
    Post 48 - SHA_COMPUTE
    Post 4B - LZX_EXPAND
    Post 4E - FETCH_OFFSET_6BL_CF
    Post 4F - VERIFY_OFFSET_6BL_CF
    Post 51 - LOAD_UPDATE_2
    Post 50 - LOAD_UPDATE_1
    Post 52 - BRANCH
    Post 58 - INIT_HYPERVISOR
    Post 5A - INIT_XEX_TRAINING
    Post 61 - INIT_HAL_PHASE_0
    Post 62 - INIT_PROCESS_OBJECTS
    Post 63 - INIT_KERNEL_DEBUGGER
    Post 64 - INIT_MEMORY_MANAGER
    Post 65 - INIT_STACKS
    Post 66 - INIT_OBJECT_SYSTEM
    Post 67 - INIT_PHASE1_THREAD
    Post 68 - Started phase 1 Initialization + INIT_PROCESSORS
    Post 69 - INIT_KEY_VAULT
    Post 6A - INIT_HAL_PHASE_1
    Post 6B - INIT_SFC_DRIVER
    Post 10 - Payload/1BL started
    Post 11 - FSB_CONFIG_PHY_CONTROL
    Post 10 - Payload/1BL started
    Post 11 - FSB_CONFIG_PHY_CONTROL
    Post 12 - FSB_CONFIG_RX_STATE
    Post 13 - FSB_CONFIG_TX_STATE
    Post 16 - FETCH_HEADER
    Post 17 - VERIFY_HEADER
    Post 1B - RC4_DECRYPT
    Post 1C - SHA_COMPUTE
    Post 1D - SIG_VERIFY
    Post 1E - BRANCH
    Post 20 - CB entry point reached
    Post 21 - INIT_SECOTP
    Post 22 - INIT_SECENG
    Post 2F - RELOCATE
    Post 23 - INIT_SYSRAM
    Post 31 - FETCH_HEADER_4BL_CD
    Post 3B - PCI_INIT
    Post 44 - FETCH_CONTENTS
    Post 47 - RC4_DECRYPT
    Post 4B - LZX_EXPAND
    Post 4D - DECODE_FUSES
    Post 51 - LOAD_UPDATE_2
    Post 52 - BRANCH
    Post 59 - INIT_SOC_MMIO
    Post 5A - INIT_XEX_TRAINING
    Post 5B - INIT_KEYRING
    Post 5C - INIT_KEYS
    Post 5F
    Post 60 - INIT_KERNEL
    Post 61 - INIT_HAL_PHASE_0
    Post 62 - INIT_PROCESS_OBJECTS
    Post 63 - INIT_KERNEL_DEBUGGER
    Post 64 - INIT_MEMORY_MANAGER
    Post 66 - INIT_OBJECT_SYSTEM
    Post 67 - INIT_PHASE1_THREAD
    Post 68 - Started phase 1 Initialization + INIT_PROCESSORS
    Most Fails(cumulative): 0x22
    Shutdown
    Power Up
    Waiting for POST to change
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 1B - RC4_DECRYPT
    Post 1C - SHA_COMPUTE
    Post 1D - SIG_VERIFY
    Post 1E - BRANCH
    Post 20 - CB entry point reached
    Post 21 - INIT_SECOTP
    Post A0 - Panic - VERIFY_SECOTP_6
    Post 03
    Post 03
    Post 01
    Post 03
    Post 03
    Post 03
    Post 01
    Post 03
    Post 03
    Post 03
    Post 01
    Post 03
    Post 01
    Post 03
    Post 03
    Post 10 - Payload/1BL started
    Post 11 - FSB_CONFIG_PHY_CONTROL
    Post 12 - FSB_CONFIG_RX_STATE
    Post 13 - FSB_CONFIG_TX_STATE
    Post 14 - FSB_CONFIG_TX_CREDITS
    Post 15 - FETCH_OFFSET
    Post 16 - FETCH_HEADER
    Post 17 - VERIFY_HEADER
    Post 18 - FETCH_CONTENTS
    Post 19 - HMACSHA_COMPUTE
    Post 1A - RC4_INITIALIZE
    Post 1B - RC4_DECRYPT
    Post 1C - SHA_COMPUTE
    Post 1D - SIG_VERIFY
    Post 1E - BRANCH
    Post 20 - CB entry point reached
    Post 21 - INIT_SECOTP
    Post 22 - INIT_SECENG
    Post 2F - RELOCATE
    Post 2E - HWINIT
    Post 31 - FETCH_HEADER_4BL_CD
    Post 33 - FETCH_CONTENTS_4BL_CD
    Post 34 - HMACSHA_COMPUTE_4BL_CD
    Post 35 - RC4_INITIALIZE_4BL_CD
    Post 36 - RC4_DECRYPT_4BL_CD
    Post 37 - SHA_COMPUTE_4BL_CD
    Post 3A - BRANCH
    Post 40 - Entrypoint of CD reached
    Post 43 - VERIFY_HEADER
    Post 44 - FETCH_CONTENTS
    Post 45 - HMACSHA_COMPUTE
    Post 46 - RC4_INITIALIZE
    Post 47 - RC4_DECRYPT
    Post 48 - SHA_COMPUTE
    Post 4B - LZX_EXPAND
    Post 4E - FETCH_OFFSET_6BL_CF
    Post 4F - VERIFY_OFFSET_6BL_CF
    Post 51 - LOAD_UPDATE_2
    Post 50 - LOAD_UPDATE_1
    Post 52 - BRANCH
    Post 58 - INIT_HYPERVISOR
    Post 5A - INIT_XEX_TRAINING
    Post 61 - INIT_HAL_PHASE_0
    Post 62 - INIT_PROCESS_OBJECTS
    Post 63 - INIT_KERNEL_DEBUGGER
    Post 64 - INIT_MEMORY_MANAGER
    Post 65 - INIT_STACKS
    Post 66 - INIT_OBJECT_SYSTEM
    Post 67 - INIT_PHASE1_THREAD
    Post 68 - Started phase 1 Initialization + INIT_PROCESSORS
    Post 69 - INIT_KEY_VAULT
    Post 6A - INIT_HAL_PHASE_1
    Post 6B - INIT_SFC_DRIVER
    Post 10 - Payload/1BL started
    Post 11 - FSB_CONFIG_PHY_CONTROL
    Post 10 - Payload/1BL started
    Post 11 - FSB_CONFIG_PHY_CONTROL
    Post 12 - FSB_CONFIG_RX_STATE
    Post 14 - FSB_CONFIG_TX_CREDITS
    Post 16 - FETCH_HEADER
    Post 18 - FETCH_CONTENTS
    Post 1B - RC4_DECRYPT
    Post 1C - SHA_COMPUTE
    Post 1D - SIG_VERIFY
    Post 1E - BRANCH
    Post 20 - CB entry point reached
    Post 21 - INIT_SECOTP
    Post 22 - INIT_SECENG
    Post 2F - RELOCATE
    Post 23 - INIT_SYSRAM
    Post 31 - FETCH_HEADER_4BL_CD
    Post 3B - PCI_INIT
    Post 44 - FETCH_CONTENTS
    Post 45 - HMACSHA_COMPUTE
    Post 48 - SHA_COMPUTE
    Post 4B - LZX_EXPAND
    Post 4D - DECODE_FUSES
    Post 4E - FETCH_OFFSET_6BL_CF
    Post 51 - LOAD_UPDATE_2
    Post 52 - BRANCH
    Post 59 - INIT_SOC_MMIO
    Post 5A - INIT_XEX_TRAINING
    Post 5B - INIT_KEYRING
    Post 5C - INIT_KEYS
    Post 5F
    Post 61 - INIT_HAL_PHASE_0
    Post 62 - INIT_PROCESS_OBJECTS
    Post 64 - INIT_MEMORY_MANAGER
    Post 66 - INIT_OBJECT_SYSTEM
    Post 67 - INIT_PHASE1_THREAD
    Post 68 - Started phase 1 Initialization + INIT_PROCESSORS
    Most Fails(cumulative): 0x22
    Shutdown
    Power Up
    Waiting for POST to change
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 47 - RC4_DECRYPT
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 7F
    Post 1B - RC4_DECRYPT
    Post 1C - SHA_COMPUTE
    Post 1D - SIG_VERIFY
    Post 1E - BRANCH
    Post 20 - CB entry point reached
    Post 21 - INIT_SECOTP
    Post 22 - INIT_SECENG
    Post 2F - RELOCATE
    Post 2E - HWINIT
    Post 31 - FETCH_HEADER_4BL_CD
    Post 33 - FETCH_CONTENTS_4BL_CD
    Post 34 - HMACSHA_COMPUTE_4BL_CD
    Post 35 - RC4_INITIALIZE_4BL_CD
    Post 36 - RC4_DECRYPT_4BL_CD
    Post 37 - SHA_COMPUTE_4BL_CD
    Post 3A - BRANCH
    Post 40 - Entrypoint of CD reached
    Post 44 - FETCH_CONTENTS
    Post 45 - HMACSHA_COMPUTE
    Post 46 - RC4_INITIALIZE
    Post 47 - RC4_DECRYPT
    Post 48 - SHA_COMPUTE
    Post 4B - LZX_EXPAND
    Post 4E - FETCH_OFFSET_6BL_CF
    Post 4F - VERIFY_OFFSET_6BL_CF
    Post 51 - LOAD_UPDATE_2
    Post 50 - LOAD_UPDATE_1
    Post 52 - BRANCH
    Post 58 - INIT_HYPERVISOR
    Post 5A - INIT_XEX_TRAINING
    Post 61 - INIT_HAL_PHASE_0
    Post 63 - INIT_KERNEL_DEBUGGER
    Post 64 - INIT_MEMORY_MANAGER
    Post 65 - INIT_STACKS
    Post 66 - INIT_OBJECT_SYSTEM
    Post 67 - INIT_PHASE1_THREAD
    Post 68 - Started phase 1 Initialization + INIT_PROCESSORS
    Post 69 - INIT_KEY_VAULT
    Post 6A - INIT_HAL_PHASE_1
    Post 6B - INIT_SFC_DRIVER
    Post 10 - Payload/1BL started
    Post 11 - FSB_CONFIG_PHY_CONTROL
    Post 10 - Payload/1BL started
    Post 11 - FSB_CONFIG_PHY_CONTROL
    Post 12 - FSB_CONFIG_RX_STATE
    Post 14 - FSB_CONFIG_TX_CREDITS
    Post 16 - FETCH_HEADER
    Post 17 - VERIFY_HEADER
    Post 18 - FETCH_CONTENTS
    Post 19 - HMACSHA_COMPUTE
    Post 1A - RC4_INITIALIZE
    Post 1B - RC4_DECRYPT
    Post 1C - SHA_COMPUTE
    Post 1D - SIG_VERIFY
    Post 1E - BRANCH
    Post 20 - CB entry point reached
    Post 21 - INIT_SECOTP
    Post 22 - INIT_SECENG
    Post 2F - RELOCATE
    Post 31 - FETCH_HEADER_4BL_CD
    Post 33 - FETCH_CONTENTS_4BL_CD
    Post 44 - FETCH_CONTENTS
    Post 45 - HMACSHA_COMPUTE
    Post 46 - RC4_INITIALIZE
    Post 48 - SHA_COMPUTE
    Post 4B - LZX_EXPAND
    Post 4D - DECODE_FUSES
    Post 4E - FETCH_OFFSET_6BL_CF
    Post 51 - LOAD_UPDATE_2
    Post 52 - BRANCH
    Post 59 - INIT_SOC_MMIO
    Post 5A - INIT_XEX_TRAINING
    Post 5B - INIT_KEYRING
    Post 5C - INIT_KEYS
    Post 5F
    Post 60 - INIT_KERNEL
    Post 61 - INIT_HAL_PHASE_0
    Post 62 - INIT_PROCESS_OBJECTS
    Post 63 - INIT_KERNEL_DEBUGGER
    Post 64 - INIT_MEMORY_MANAGER
    Post 65 - INIT_STACKS
    Post 66 - INIT_OBJECT_SYSTEM
    Post 67 - INIT_PHASE1_THREAD
    Post 68 - Started phase 1 Initialization + INIT_PROCESSORS
    Most Fails(cumulative): 0x22
    Shutdown




    r-jtag xell si avvia ma il freeboot no!!!-last.png
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  7. 17-12-13 #47
    dj0hackers
    dj0hackers è offline
    Junior Member
    Data Registrazione
    Mar 2013
    Messaggi
    28
    ok ha vinto lei ci ho rinunciato rimango con lt3.0 =(
    x me si può chiudere la discussione
    GRAZIE A TUTTI!
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